Patents by Inventor Setsuya Nagaya

Setsuya Nagaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9503132
    Abstract: A wireless communication apparatus includes an amplifying unit that amplifies an input signal that includes signals with different frequencies of a first frequency and the second frequency; a measuring unit that measures a level of inter modulation distortion generated in a signal obtained by the input signal being amplified by the amplifying unit; a determining unit that determines whether the level of the inter modulation distortion measured by the measuring unit is equal to or greater than a regulation value that is previously stored; and a control unit that decreases, when a result of the determination obtained by the determining unit indicates that the level of the inter modulation distortion is equal to or greater than the regulation value, a level of a signal input to the amplifying unit.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: November 22, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Mutsuhito Ota, Setsuya Nagaya, Shinichi Kawai, Yusuke Yamamori
  • Publication number: 20160080010
    Abstract: A wireless communication apparatus includes an amplifying unit that amplifies an input signal that includes signals with different frequencies of a first frequency and the second frequency; a measuring unit that measures a level of inter modulation distortion generated in a signal obtained by the input signal being amplified by the amplifying unit; a determining unit that determines whether the level of the inter modulation distortion measured by the measuring unit is equal to or greater than a regulation value that is previously stored; and a control unit that decreases, when a result of the determination obtained by the determining unit indicates that the level of the inter modulation distortion is equal to or greater than the regulation value, a level of a signal input to the amplifying unit.
    Type: Application
    Filed: July 29, 2015
    Publication date: March 17, 2016
    Inventors: Mutsuhito OTA, Setsuya NAGAYA, Shinichi Kawai, Yusuke Yamamori
  • Patent number: 9209846
    Abstract: A radio communication circuit includes a transmitter that includes a modulator modulates a signal with a first modulation scheme and a power amplifier amplifies the signal modulated with the first modulation scheme and output the amplified signal and transmits the amplified signal, a receiver that includes a demodulator demodulates the signal output from the transmitter with a second modulation scheme that is different from the first modulation scheme, a pre-distortion compensator compensates occurred upon the amplification of the signal, of the signal input to the transmitter, based on the demodulated signal and a power controller controls supply of power to the receiver and the pre-distortion compensator and stop the supply of the power based on an average power level of the signal output from the transmitter and a peak-to-average power ratio that is a ratio of an instantaneous peak power level to the average power level.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: December 8, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Youji Nakata, Setsuya Nagaya, Kosei Nishimura, Masaaki Saitou, Mikio Hayashihara, Atsushi Kudo
  • Patent number: 8982740
    Abstract: In a wireless communication device, in a correction value calculating mode, a control unit flips switches to the “a” sides, a modulation processing unit generates a CW signal as an I channel signal, a DAC converts the digital CW signal into an analog CW signal, an LPF eliminates the high-frequency component from the CW signal, a mixer functions as an up-converter for up-converting the CW signal, a PA amplifies the RF power of the CW signal, a mixer functions as a down-converter for down-converting the CW signal, an ADC converts the analog CW signal into a digital CW signal, a level detecting unit detects the voltage level of the CW signal, a correction value calculating unit calculates a correction value based on the detected voltage level, and a correction value storing unit stores the calculated correction value.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: March 17, 2015
    Assignee: Fujitsu Limited
    Inventors: Setsuya Nagaya, Shinji Kakizaki, Youji Nakata, Mutsuhito Ota
  • Publication number: 20150065061
    Abstract: A radio communication circuit includes a transmitter that includes a modulator modulates a signal with a first modulation scheme and a power amplifier amplifies the signal modulated with the first modulation scheme and output the amplified signal and transmits the amplified signal, a receiver that includes a demodulator demodulates the signal output from the transmitter with a second modulation scheme that is different from the first modulation scheme, a pre-distortion compensator compensates occurred upon the amplification of the signal, of the signal input to the transmitter, based on the demodulated signal and a power controller controls supply of power to the receiver and the pre-distortion compensator and stop the supply of the power based on an average power level of the signal output from the transmitter and a peak-to-average power ratio that is a ratio of an instantaneous peak power level to the average power level.
    Type: Application
    Filed: August 29, 2014
    Publication date: March 5, 2015
    Inventors: Youji NAKATA, Setsuya NAGAYA, Kosei NISHIMURA, Masaaki SAITOU, Mikio HAYASHIHARA, Atsushi KUDO
  • Publication number: 20130258910
    Abstract: In a wireless communication device, in a correction value calculating mode, a control unit flips switches to the “a” sides, a modulation processing unit generates a CW signal as an I channel signal, a DAC converts the digital CW signal into an analog CW signal, an LPF eliminates the high-frequency component from the CW signal, a mixer functions as an up-converter for up-converting the CW signal, a PA amplifies the RF power of the CW signal, a mixer functions as a down-converter for down-converting the CW signal, an ADC converts the analog CW signal into a digital CW signal, a level detecting unit detects the voltage level of the CW signal, a correction value calculating unit calculates a correction value based on the detected voltage level, and a correction value storing unit stores the calculated correction value.
    Type: Application
    Filed: December 18, 2012
    Publication date: October 3, 2013
    Inventors: Setsuya NAGAYA, Shinji KAKIZAKI, Youji NAKATA, Mutsuhito OTA
  • Patent number: 8548401
    Abstract: An amplifier circuit includes an amplifier, a detecting unit which detects a power output from the amplifier, a control unit which controls a saturation point of the amplifier with respect to a Peak-to-Average Power Ratio (PAPR) obtained by a detection output of the detecting unit.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: October 1, 2013
    Assignee: Fujitsu Limited
    Inventors: Akio Sasaki, Setsuya Nagaya, Narito Matsuno, Kenji Iwai
  • Publication number: 20120157020
    Abstract: An amplifier circuit includes an amplifier, a detecting unit which detects a power output from the amplifier, a control unit which controls a saturation point of the amplifier with respect to a Peak-to-Average Power Ratio (PAPR) obtained by a detection output of the detecting unit.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 21, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Akio SASAKI, Setsuya NAGAYA, Narito MATSUNO, Kenji IWAI
  • Publication number: 20120099624
    Abstract: A communication device includes a transmitting circuit that includes a quadrature modulator; a receiving circuit that operates as a quadrature demodulator that, when being in a data non-transferring period, starts when power is switched on and ends when receiving operation starts, switches a local oscillator signal to a harmonic receiving signal, and detects the signal level of a harmonic included in a signal output from the transmitting circuit; a harmonic extracting circuit and a voltage control circuit that extract a harmonic from a modulated signal and adjust the harmonic so as to set the signal level less than or equal to a predetermined threshold. When being in the data non-transferring period, the transmitting circuit outputs a signal to the receiving circuit, the signal being generated by combining an amplified modulated signal with an under-adjustment signal.
    Type: Application
    Filed: July 12, 2011
    Publication date: April 26, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Setsuya NAGAYA, Akio Sasaki, Narito Matsuno, Kenji Iwai, Shinichi Kawai
  • Patent number: 5734298
    Abstract: An amplifying circuit is suitable for an integrated circuit that has a characteristic of low-noise, high-gain, and low-consumptive current. In the circuit, transistors or FETs are used as amplifying elements. A basic amplifying circuit employing transistors, that forms a differential pair of first and second transistors, first and second resistors connected to each collector of the first and second transistors, and a constant current source connected to a common emitter of the first and second transistors, comprises a third transistor, of which emitter is connected to a connecting point of the first and second resistors, a condenser connected between a connecting point of the first transistor and the first resistor, or a connecting point of the second transistor and the second resistor, and a base of the third transistor, and a voltage source connected to a collector of the third transistor, wherein outputs are obtained from an emitter of the third transistor.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: March 31, 1998
    Assignee: Fujitsu Limited
    Inventors: Setsuya Nagaya, Hideo Sugawara, Tominaga Watanabe
  • Patent number: 5648743
    Abstract: An amplifying circuit is suitable for an integrated circuit that has a characteristic of low-noise, high-gain, and low-consumptive current. In the circuit, transistors or FETs are used as amplifying elements. A basic amplifying circuit employing transistors, that forms a differential pair of first and second transistors, first and second resistors connected to each collector of the first and second transistors, and a constant current source connected to a common emitter of the first and second transistors, comprises a third transistor, of which emitter is connected to a connecting point of the first and second resistors, a condenser connected between a connecting point of the first transistor and the first resistor, or a connecting point of the second transistor and the second resistor, and a base of the third transistor, and a voltage source connected to a collector of the third transistor, wherein outputs are obtained from an emitter of the third transistor.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: July 15, 1997
    Assignee: Fujitsu Limited
    Inventors: Setsuya Nagaya, Hideo Sugawara, Tominaga Watanabe