Patents by Inventor Setsuya Oku

Setsuya Oku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8258452
    Abstract: Provided is a light receiving circuit including: a photodiode; a first amplifier including a feedback resistor connected between an input and an output of an inverting amplifier and having an input connected to a cathode of the photodiode; a second amplifier having a configuration similar to that of the first amplifier and having an input connected to an anode of the photodiode; a capacitor element connected between an output of the first amplifier and the input of the second amplifier; and a bias current control circuit that outputs a bias current to the input of the second amplifier according to a current value of the photocurrent, and controls an output voltage signal of the light receiving circuit according to an output of the second amplifier by using the bias current to adjust the sensitivity. The bias current control circuit changes the sensitivity according to the output of the second amplifier.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: September 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Setsuya Oku
  • Publication number: 20120193518
    Abstract: A photoreceptor circuit includes: a first amplifier circuit where a feedback resistor is coupled between an input and output of an inverting amplifier; a second amplifier circuit that has a configuration substantially identical to a configuration of the first amplifier circuit and supplies a bias current to the first amplifier circuit; a photodiode having an anode coupled to an input of the first amplifier circuit and a cathode coupled to an input of the second amplifier circuit; and a first resistor coupled between an output of the second amplifier circuit and the input of the first amplifier circuit.
    Type: Application
    Filed: January 18, 2012
    Publication date: August 2, 2012
    Inventors: Masafumi SHIMIZU, Setsuya Oku
  • Publication number: 20110204213
    Abstract: A light amplification circuit includes a photodiode PD with an epi-sub structure, an I/V conversion circuit that converts current output from the PD into a voltage, and a correction circuit that removes charge and discharge current, which is cause by a parasitic capacitance of the photodiode, from current output from the PD between the PD and the I/V conversion circuit.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 25, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Masafumi SHIMIZU, Setsuya OKU
  • Patent number: 8004440
    Abstract: A transimpedance amplifier according to an exemplary aspect of the present invention includes a first terminal supplied with a first power supply voltage, and a second terminal supplied with a second power supply voltage having a potential lower than that of the first power supply voltage. The transimpedance amplifier outputs a voltage signal that is converted into a binary signal of one of the first power supply voltage and the second power supply voltage, based on an input analog current signal. This makes it possible to reduce a conversion error.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: August 23, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Setsuya Oku
  • Publication number: 20100194617
    Abstract: A transimpedance amplifier according to an exemplary aspect of the present invention includes a first terminal supplied with a first power supply voltage, and a second terminal supplied with a second power supply voltage having a potential lower than that of the first power supply voltage. The transimpedance amplifier outputs a voltage signal that is converted into a binary signal of one of the first power supply voltage and the second power supply voltage, based on an input analog current signal. This makes it possible to reduce a conversion error.
    Type: Application
    Filed: January 20, 2010
    Publication date: August 5, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Setsuya OKU
  • Publication number: 20100148038
    Abstract: Provided is a light receiving circuit including: a photodiode; a first amplifier including a feedback resistor connected between an input and an output of an inverting amplifier and having an input connected to a cathode of the photodiode; a second amplifier having a configuration similar to that of the first amplifier and having an input connected to an anode of the photodiode; a capacitor element connected between an output of the first amplifier and the input of the second amplifier; and a bias current control circuit that outputs a bias current to the input of the second amplifier according to a current value of the photocurrent, and controls an output voltage signal of the light receiving circuit according to an output of the second amplifier by using the bias current to adjust the sensitivity. The bias current control circuit changes the sensitivity according to the output of the second amplifier.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 17, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Setsuya Oku
  • Publication number: 20050064897
    Abstract: The present invention provides a dual band transmitting/receiving device, which can perform transmission and diversity reception with low insertion loss in that the number of switches for switching antennas is small. The dual band transmitting/receiving device is constituted such that transmitting/receiving dual band antennas 1 and 2 capable of being used in both of 5 GHz band used with IEEE 802.11a communication standard and 2.4 GHz band used with IEEE 802.11b communication standard are connected to respective transmitting circuits 7 and 9 and respective receiving circuits 8 and 10 used with respective communication standards, in a state where the above each signaling path between the each antenna and the each receiving circuit or transmitting circuit is connected via the only one switch.
    Type: Application
    Filed: September 21, 2004
    Publication date: March 24, 2005
    Inventors: Kazunori Nohara, Setsuya Oku
  • Patent number: 6147509
    Abstract: An FPGA is provided with a plurality of logic circuits and memories. By transmitting logic circuit information to the memories of the logic circuits which are not operating, and switching to the logic circuits which are operating when the transmission is completed, the FPGA is capable of operating such that there is no operational transmission period.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Setsuya Oku
  • Patent number: 5523669
    Abstract: A parallel circuit of a charging resistor and a discharging diode D2 is connected in series only to a battery. An external DC power supply voltage can be supplied from external DC power supply terminals directly to a power supply circuit without going through a charging resistor for the battery.
    Type: Grant
    Filed: July 26, 1993
    Date of Patent: June 4, 1996
    Assignee: NEC Corporation
    Inventors: Setsuya Oku, Yasuhiro Shirakawa