Patents by Inventor Setti S. Rao

Setti S. Rao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MEMORY ARRAY ARCHITECTURES HAVING MEMORY CELLS WITH SHARED WRITE ASSIST CIRCUITRY
    Publication number: 20150103604
    Abstract: A memory device includes a memory array having a plurality of memory cells each having first and second power supply nodes, first and second virtual power supply nodes, a latch circuit, and a write assist circuit. The latch circuit includes a first and second inverters in a cross-coupled inverter configuration. The first inverter is connected between the first virtual power supply node and the second power supply node, and the second inverter is connected between the second virtual power supply node and the second power supply node.
    Type: Application
    Filed: December 11, 2013
    Publication date: April 16, 2015
    Applicant: LSI Corporation
    Inventors: Mohammed S.K. Sheikh, Setti S. Rao, Vinod Rachamadugu
  • Dual rail power supply scheme for memories
    Patent number: 8724421
    Abstract: A dual rail memory operable at a first voltage and a second voltage includes an input circuit, an output circuit and a clock generator circuit coupled with the input circuit. The input circuit is operable to receive at least a first input signal referenced to the first voltage and to generate a second input signal referenced to the second voltage. The output circuit is operable to receive at least a first output signal referenced to the second voltage and to generate a second output signal referenced to the first voltage. The clock generator circuit is operable to receive a first clock signal referenced to the first voltage and to generate a second clock signal referenced to the second voltage, a logic state of the second clock signal being a function of a logic state of the first clock signal.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: May 13, 2014
    Assignee: LSI Corporation
    Inventors: Donald A. Evans, Rasoju V. Chary, Ankur Goel, Setti S. Rao
  • DUAL RAIL POWER SUPPLY SCHEME FOR MEMORIES
    Publication number: 20140025981
    Abstract: A dual rail memory operable at a first voltage and a second voltage includes an input circuit, an output circuit and a clock generator circuit coupled with the input circuit. The input circuit is operable to receive at least a first input signal referenced to the first voltage and to generate a second input signal referenced to the second voltage. The output circuit is operable to receive at least a first output signal referenced to the second voltage and to generate a second output signal referenced to the first voltage. The clock generator circuit is operable to receive a first clock signal referenced to the first voltage and to generate a second clock signal referenced to the second voltage, a logic state of the second clock signal being a function of a logic state of the first clock signal.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 23, 2014
    Applicant: LSI Corporation
    Inventors: Donald A. Evans, Rasoju V. Chary, Ankur Goel, Setti S. Rao