Patents by Inventor Seulgi Bae

Seulgi Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230178487
    Abstract: A semiconductor device including an insulating structure, and a conductive structure in the insulating structure may be provided. The conductive structure includes a barrier layer, an anti-migration layer on the barrier layer, a liner on the anti-migration layer, a conductive layer on the liner, and a capping layer covering a top surface of the barrier layer and a top surface of the anti-migration layer. The capping layer and the liner include Co. The anti-migration layer includes Mn.
    Type: Application
    Filed: August 23, 2022
    Publication date: June 8, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jungha HWANG, Dongchan LIM, Seulgi BAE
  • Patent number: 10347527
    Abstract: A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: July 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangho Rha, Kyoung Hee Nam, Jeonggil Lee, Hyunseok Lim, Seungjong Park, Seulgi Bae, Jaejin Lee, Kwangtae Hwang
  • Publication number: 20180261499
    Abstract: A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.
    Type: Application
    Filed: May 9, 2018
    Publication date: September 13, 2018
    Inventors: SANGHO RHA, KYOUNG HEE NAM, JEONGGIL LEE, HYUNSEOK LIM, SEUNGJONG PARK, SEULGI BAE, JAEJIN LEE, KWANGTAE HWANG
  • Patent number: 9997400
    Abstract: A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: June 12, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangho Rha, Kyoung Hee Nam, Jeonggil Lee, Hyunseok Lim, Seungjong Park, Seulgi Bae, Jaejin Lee, Kwangtae Hwang
  • Publication number: 20170170058
    Abstract: A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.
    Type: Application
    Filed: October 24, 2016
    Publication date: June 15, 2017
    Inventors: SANGHO RHA, KYOUNG HEE NAM, JEONGGIL LEE, HYUNSEOK LIM, SEUNGJONG PARK, SEULGI BAE, JAEJIN LEE, KWANGTAE HWANG
  • Patent number: 9657385
    Abstract: A method of manufacturing a thermochromic substrate, with which transmittance can be increased. The method includes the steps of forming a first thin film as a coating on a base substrate, the refractive index of the first thin film being different from that of a VO2 thin film; forming a pre-thermochromic thin film by coating the first thin film with pure vanadium; forming a second thin film as a coating on the pre-thermochromic thin film, the refractive index of the second thin film being different from that of a VO2 thin film; and heat-treating a resultant stack that includes the base substrate, the first thin film, the pre-thermochromic thin film and the second thin film.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: May 23, 2017
    Assignee: Corning Precision Materials Co., Ltd.
    Inventors: Yong Won Choi, Yung-Jin Jung, Hyun Bin Kim, Seulgi Bae
  • Patent number: 9146408
    Abstract: A thermochromic window that can effectively insulate heat when warming is conducted in winter. The thermochromic window that includes a substrate, a thermochromic thin film formed on the substrate, and a transparent conductive film formed on at least one surface of the upper surface and the undersurface of the thermochromic thin film. The emissivity of the transparent conductive film is lower than the emissivity of the thermochromic thin film.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: September 29, 2015
    Assignee: Corning Precision Materials Co., Ltd.
    Inventors: Seulgi Bae, Sang-Ryoun Ryu, Chang Gyu Kim, Hyun Bin Kim, Dong-Gun Moon, Young Soo Jung, Yung-Jin Jung, Jee Yun Cha, Yong Won Choi
  • Publication number: 20140327953
    Abstract: A thermochromic window, the sunlight transmittance of which is adjustable depending on the temperature, and a method of fabricating the same. The thermochromic window includes a flexible substrate, a thermochromic thin film disposed on the flexible substrate, and a hot-processed substrate bonded to the thermochromic thin film.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 6, 2014
    Applicant: SAMSUNG CORNING PRECISION MATERIALS CO., LTD.
    Inventors: Youngsoo Jung, Seulgi Bae, Hyun Bin Kim, Yung-Jin Jung, Yongwon Choi
  • Publication number: 20130335803
    Abstract: A thermochromic window that can effectively insulate heat when warming is conducted in winter. The thermochromic window that includes a substrate, a thermochromic thin film formed on the substrate, and a transparent conductive film formed on at least one surface of the upper surface and the undersurface of the thermochromic thin film. The emissivity of the transparent conductive film is lower than the emissivity of the thermochromic thin film.
    Type: Application
    Filed: June 13, 2013
    Publication date: December 19, 2013
    Inventors: Seulgi Bae, Sang-Ryoun Ryu, Chang Gyu Kim, Hyun Bin Kim, Dong-Gun Moon, Young Soo Jung, Yung-Jin Jung, Jee Yun Cha, Yong Won Choi
  • Publication number: 20130029473
    Abstract: A method of cleaving a substrate and a method of manufacturing a bonded substrate using the same, in which warping in a cleaved substrate is reduced. The method includes the following steps of: forming an ion implantation layer by implanting ions into a substrate; annealing the substrate in which the ion implantation layer is formed; implanting ions again into the ion implantation layer of the substrate; and cleaving the substrate along the ion implantation layer by heating the substrate into which ions are implanted.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 31, 2013
    Inventors: Dong-Woon KIM, Donghyun Kim, Mikyoung Kim, MINJU KIM, SEUNG YONG PARK, Seulgi Bae, JOONG WON SHUR, Yulia Yu, Bohyun Lee, BONGHEE JANG