Abstract: An array substrate includes a plurality of data lines, a plurality of gamma lines, a repair pad, a repair line, an inspection pad and an inspection line. The data lines transmit a data voltage to an active region. The gamma lines apply a gamma reference voltage to generate the data voltage. The repair pad repairs the data line. The repair line extends from the repair pad. The repair line is disposed adjacent to the gamma line. The inspection pad applies an inspection signal. The inspection line extends from the inspection pad. The inspection line is connected to the data lines. The gamma lines are connected to the inspection line.

Abstract: A thin film transistor array panel includes an insulation substrate; a gate line and a data line on the insulation substrate; a first passivation layer on the gate line and the data line; an organic layer on the first passivation layer; a first electrode on the organic layer; a second passivation layer on the first electrode; and a second electrode on the second passivation layer. An edge of the organic layer is exposed by the first electrode.

Abstract: A method of forming a metal pattern is disclosed. According to the method, a gate electrode and a pixel electrode are formed on a substrate. A metal layer is formed covering the gate electrode and the pixel electrode. A photo pattern is formed wherein a thickness of an area of the photo pattern that overlaps the gate electrode is smaller than a thickness of other areas of the photo pattern. The photo pattern is soft-baked. The photo pattern is exposed to light. The photo pattern is developed to expose a portion of the metal layer that overlaps the gate electrode. The exposed portion of the metal layer is removed to form a source electrode and a drain electrode, the source electrode and the drain electrode being spaced apart from each other with respect to the gate electrode.

Abstract: A display device includes a first insulation substrate, a gate line disposed on the first insulation substrate, a semiconductor layer disposed on the gate line, a data line insulated from and crossing the gate line and including a source electrode and a drain electrode facing the source electrode, a first insulating layer disposed on the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a second insulating layer disposed on the pixel electrode, a common electrode disposed on the second insulating layer, and a shielding pattern part disposed on a same layer as the pixel electrode and overlapping the data line.

Abstract: A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract: Provided is a propylene-based elastomer having high tacticity and excellent mechanical properties. The propylene-based elastomer includes 50% by weight or more of a propylene-based repeating unit, and satisfies a particular relationship between an ethylene content and tacticity.

Abstract: Provided is a propylene-based elastomer having a narrow molecular weight distribution, a high density in the same comonomer content, and excellent mechanical properties. The propylene-based elastomer includes 50% by weight or more of a propylene-based repeating unit, and satisfies a particular relationship between an ethylene content and a molar ratio of a specific monomer sequence.

Abstract: A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract: A method of forming a metal pattern is disclosed. According to the method, a gate electrode and a pixel electrode are formed on a substrate. A metal layer is formed covering the gate electrode and the pixel electrode. A photo pattern is formed wherein a thickness of an area of the photo pattern that overlaps the gate electrode is smaller than a thickness of other areas of the photo pattern. The photo pattern is soft-baked. The photo pattern is exposed to light. The photo pattern is developed to expose a portion of the metal layer that overlaps the gate electrode. The exposed portion of the metal layer is removed to form a source electrode and a drain electrode, the source electrode and the drain electrode being spaced apart from each other with respect to the gate electrode.

Abstract: The present invention relates to a sealing tool for a pouch type secondary battery, which seals a pouch provided with an electrode assembly therein, the sealing tool including: a holder elevatably disposed on each of upper and lower sides of the pouch; and a sealing block coupled to the holder to contact the pouch by the elevation of the holder, thereby sealing the pouch. The sealing block and the holder are spaced apart from each other to define a space therebetween. According to the present invention, a spacing member is interposed between the holder and the sealing block of the sealing tool to define a space into which the sealing block is deformable, thereby minimizing the deformation of a sealing surface of the sealing block. Thus, the sealing part of the pouch may have a uniform thickness to prevent an electrolyte within the pouch from leaking to the outside.

Abstract: The present invention relates to a novel ligand compound, a preparation method thereof, a transition metal compound including the ligand compound, and a preparation method thereof. The ligand compound of novel structure according to the present invention and the transition metal compound including the same may be used as a polymerization reaction catalyst for preparing olefin polymers.

Abstract: A display substrate for a display device includes: a substrate which includes a light blocking region defining a plurality of pixel areas disposed in a matrix, each pixel area having a length extending in a second direction, and a width extending in a first direction; a color filter overlapping a portion of the each pixel area of the plurality of pixel areas; and an alignment layer disposed on the color filter. the color filter includes a first edge parallel to the second direction, and a second edge forming a predetermined angle with the first edge. The second edge is substantially parallel to an alignment direction of the alignment layer.

Abstract: The present invention relates to a novel ligand compound, a preparation method thereof, a transition metal compound including the ligand compound, and a preparation method thereof. The ligand compound of novel structure according to the present invention and the transition metal compound including the same may be used as a polymerization reaction catalyst for preparing olefin polymers.

Abstract: A display device includes a first insulation substrate, a gate line disposed on the first insulation substrate, a semiconductor layer disposed on the gate line, a data line insulated from and crossing the gate line and including a source electrode and a drain electrode facing the source electrode, a first insulating layer disposed on the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a second insulating layer disposed on the pixel electrode, a common electrode disposed on the second insulating layer, and a shielding pattern part disposed on a same layer as the pixel electrode and overlapping the data line.

Abstract: An array substrate includes a plurality of data lines, a plurality of gamma lines, a repair pad, a repair line, an inspection pad and an inspection line. The data lines transmit a data voltage to an active region. The gamma lines apply a gamma reference voltage to generate the data voltage. The repair pad repairs the data line. The repair line extends from the repair pad. The repair line is disposed adjacent to the gamma line. The inspection pad applies an inspection signal. The inspection line extends from the inspection pad. The inspection line is connected to the data lines. The gamma lines are connected to the inspection line.

Abstract: A display panel includes a plurality of display signal lines positioned in a display area. A plurality of test pads are positioned in a peripheral area around the display area and are respectively connected to the plurality of display signal lines. The plurality of test pads include a first test pad positioned at an edge of the peripheral area and a second test pad positioned at the middle of the peripheral area. A shorting bar is connected to the plurality of test pads through a contact assistant. The first test pad is connected to the second test pad through a connection line.

Abstract: A thin film transistor array panel includes an insulation substrate; a gate line and a data line on the insulation substrate; a first passivation layer on the gate line and the data line; an organic layer on the first passivation layer; a first electrode on the organic layer; a second passivation layer on the first electrode; and a second electrode on the second passivation layer. An edge of the organic layer is exposed by the first electrode.

Abstract: A display, includes: a substrate; first signal lines (FSLs) disposed on the substrate and extending in substantially a first direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the first direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract: A display, includes: a substrate; first signal lines (FSLs) at least partially recessed in the substrate and extending in substantially a direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.

Abstract: A display substrate for a display device includes: a substrate which includes a light blocking region defining a plurality of pixel areas disposed in a matrix, each pixel area having a length extending in a first direction, and a width extending in a second direction; a color filter overlapping a portion of the each pixel area of the plurality of pixel areas; and an alignment layer disposed on the color filter. The color filter includes a first edge parallel to the first direction and a second edge forming a predetermined angle with the first edge. The second edge is substantially parallel to an alignment direction of the alignment layer.