Patents by Inventor Seung Boo Jung

Seung Boo Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11094663
    Abstract: Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: August 17, 2021
    Assignee: Research and Business Foundation Sungkyunkwan University
    Inventors: Seung Boo Jung, Kyung Deuk Min, Kwang Ho Jung, Choong Jae Lee, Hak San Jeong, Jae Ha Kim, Byeong Uk Hwang
  • Publication number: 20200381385
    Abstract: Disclosed is a method for transient liquid-phase bonding between metal materials using a magnetic force. In particular, in the method, a magnetic force is applied to a transient liquid-phase bonding process, thereby shortening a transient liquid-phase bonding time between the metal materials, and obtaining high bonding strength. To this end, an attractive magnetic force is applied to a ferromagnetic base while a repulsive magnetic force is applied to a diamagnetic base, thereby to accelerate diffusion. This may reduce a bonding time during a transient liquid-phase bonding process between two bases and suppress formation of Kirkendall voids and voids and suppress a layered structure of an intermetallic compound, thereby to increase a bonding strength.
    Type: Application
    Filed: May 8, 2020
    Publication date: December 3, 2020
    Applicant: Research & Business Foundation Sungkyunkwan University
    Inventors: Seung Boo JUNG, Kyung Deuk MIN, Kwang Ho JUNG, Choong Jae LEE, Hak San JEONG, Jae Ha KIM, Byeong Uk HWANG
  • Patent number: 8048793
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: November 1, 2011
    Assignee: Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Seung Boo Jung, Jong Woong Kim
  • Publication number: 20090139758
    Abstract: A printed circuit board (PCB) assembly is disclosed, which includes a first PCB on which a plurality of first electrode terminals are arranged at intervals from one another; a second PCB on which a plurality of second electrode terminals respectively connected with the first electrode terminals are arranged at intervals from one another; and separation preventing member which prevents the first and the second electrode terminals from deviating from their correct positions when the first and the second electrode terminals are ultrasonically-welded to each other. Accordingly, lateral movement of the first and the second PCBs relative to each other is restricted owing to the separation preventing member, the plurality of first electrode terminals and second electrode terminals can be bonded to each other without deviating from their correct positions.
    Type: Application
    Filed: June 3, 2008
    Publication date: June 4, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo Young Shin, Seung Boo Jung, Young Jun Moon, Soon Min Hong, Chang Yong Lee, Ja Myeong Koo, Hyun Tae Kim, Jong Bum Lee, Hyun Joo Han
  • Publication number: 20090057921
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Application
    Filed: September 3, 2008
    Publication date: March 5, 2009
    Applicant: SUNGKYUNKWAN UNIVERSITY FOUNDATION FOR CORPORATE COLLABORATION
    Inventors: Seung Boo JUNG, Jong Woong KIM
  • Patent number: RE48421
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: February 2, 2021
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIV.
    Inventors: Seung Boo Jung, Jong Woong Kim
  • Patent number: RE48422
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: February 2, 2021
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIV.
    Inventors: Seung Boo Jung, Jong Woong Kim
  • Patent number: RE49286
    Abstract: Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: November 8, 2022
    Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIV.
    Inventors: Seung Boo Jung, Jong Woong Kim