Patents by Inventor Seung-Chang Lee

Seung-Chang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155150
    Abstract: The present invention relates to a method for encoding and decoding an image. The method for decoding an image includes: deriving an initial motion vector from a merge candidate list of a current block; deriving a refined motion vector using the initial motion vector; and generating a prediction block of the current block using the refined motion vector.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 9, 2024
    Inventors: Ha Hyun LEE, Jung Won KANG, Hyun Suk KO, Sung Chang LIM, Jin Ho LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Publication number: 20240155110
    Abstract: The present invention relates to an image encoding method and an image decoding method. The image decoding method includes partitioning a picture into a plurality of coding units, constructing a coding unit group including at least one coding unit of the plurality of coding units, obtaining coding information in units of one coding unit group, and decoding at least one coding unit of the plurality of coding units included in the coding unit group by using the obtained coding information.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jung Won KANG, Sung Chang LIM, Hyun Suk KO, Ha Hyun LEE, Jin Ho LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Publication number: 20240136094
    Abstract: A magnetic core according to one embodiment of the present invention includes a material formed of iron (Fe)-silicon (Si)-boron (B), wherein a mass percentage of Fe in a first surface, which is an upper surface, is different from a mass percentage of Fe in a second surface which is a side surface, and a ratio of the mass percentage of Fe in the first surface to a difference between the mass percentage of Fe in the first surface and the mass percentage of Fe in the second surface is in the range of 6 to 21.
    Type: Application
    Filed: February 18, 2022
    Publication date: April 25, 2024
    Inventors: Seung Eun LEE, Ji Chang RYU, Jung Ki LEE
  • Publication number: 20240137511
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY, HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jin-Ho LEE, Jung-Won KANG, Hyunsuk KO, Sung-Chang LIM, Dong-San JUN, Ha-Hyun LEE, Seung-Hyun CHO, Hui-Yong KIM, Hae-Chul CHOI, Dae-Hyeok GWON, Jae-Gon KIM, A-Ram BACK
  • Publication number: 20240121385
    Abstract: The present invention relates to an intra prediction method and apparatus. The image decoding method according to the present invention may comprise decoding information on intra prediction; and generating a prediction block by performing intra prediction for a current block based on the information on intra prediction. The information on intra prediction may include information on an intra prediction mode, and the intra prediction mode may include a curved intra prediction mode.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Patent number: 11955183
    Abstract: A non-volatile memory includes a memory cell region including an outer region proximate a first end of the memory cell region and an inner region separated from the first end by the outer region, first and second bit lines, an outer memory cell string including memory cells connected to an outer pillar extending vertically upward through the outer region, and an inner memory cell string including memory cells connected to an inner pillar extending vertically upward through the inner region, and a data input/output (I/O). The data I/O circuit includes a page buffer circuit that connects the first bit line during a first read operation directed to memory cells of the outer memory cell string, and connects the second bit line during a second read operation directed to memory cells of the inner memory cell string, and a read voltage determination unit that selects a first optimal read voltage used during the first read operation, and a second optimal read voltage used during the second read operation.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: April 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su Chang Jeon, Seung Bum Kim, Ji Young Lee
  • Publication number: 20240098311
    Abstract: The present invention relates to an image encoding/decoding method and apparatus. An image encoding method according to the present invention may comprise generating a transform block by performing at least one of transform and quantization; grouping at least one coefficient included in the transform block into at least one coefficient group (CG); scanning at least one coefficient included in the coefficient group; and encoding the at least one coefficient.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY ACADEMY COOPERATION FOUNDATION OF SEJONG UNIVERSITY
    Inventors: Sung Chang LIM, Jung Won KANG, Hyun Suk KO, Jin Ho LEE, Dong San JUN, Ha Hyun LEE, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI, Yung Lyul LEE, Jun Woo CHOI
  • Publication number: 20240097088
    Abstract: A backplane substrate, a display device, and a tiled display device are provided. The backplane substrate of a display device includes subpixels. The backplane substrate includes a support substrate, a circuit layer on a first surface of the support substrate and including pixel drivers corresponding to the subpixels, respectively, an electrode layer on the circuit layer and including an anode and a cathode corresponding to an emission area of each of the subpixels, a bank layer on the circuit layer and corresponding to an area around the emission area of each of the subpixels, and a valley spaced from edges of the support substrate and penetrating at least the bank layer.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 21, 2024
    Inventors: Jin Ho HYUN, Seung Wook KWON, Hee Chang YOON, Hye Min LEE
  • Patent number: 11936853
    Abstract: The present invention relates to an image encoding method and an image decoding method. The image decoding method includes partitioning a picture into a plurality of coding units, constructing a coding unit group including at least one coding unit of the plurality of coding units, obtaining coding information in units of one coding unit group, and decoding at least one coding unit of the plurality of coding units included in the coding unit group by using the obtained coding information.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: March 19, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jung Won Kang, Sung Chang Lim, Hyun Suk Ko, Ha Hyun Lee, Jin Ho Lee, Dong San Jun, Seung Hyun Cho, Hui Yong Kim, Jin Soo Choi
  • Patent number: 11917148
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 27, 2024
    Assignees: Electronics And Telecommunications Research Institute, Industry-University Cooperation Foundation Korea Aerospace University, Hanbat National University Industry-Academic Cooperation Foundation
    Inventors: Jin-Ho Lee, Jung-Won Kang, Hyunsuk Ko, Sung-Chang Lim, Dong-San Jun, Ha-Hyun Lee, Seung-Hyun Cho, Hui-Yong Kim, Hae-Chul Choi, Dae-Hyeok Gwon, Jae-Gon Kim, A-Ram Back
  • Patent number: 11469104
    Abstract: Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: October 11, 2022
    Inventors: Seung-Chang Lee, Steven R. J. Brueck
  • Patent number: 11456370
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: September 27, 2022
    Assignee: UNM RAINFOREST INNOVATIONS
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Publication number: 20220293768
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 15, 2022
    Inventors: Steven R.J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Publication number: 20220285526
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Application
    Filed: May 24, 2022
    Publication date: September 8, 2022
    Inventors: Steven R.J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 11374106
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: June 28, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 11349011
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 31, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 11342442
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 24, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 11342438
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: May 24, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 11342441
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 24, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell
  • Patent number: 11296208
    Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: April 5, 2022
    Inventors: Steven R. J. Brueck, Stephen D. Hersee, Seung-Chang Lee, Daniel Feezell