Patents by Inventor Seung Chul Lee

Seung Chul Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8957754
    Abstract: A wound transformer core is provided with at least one core loop made of a magnetic material. The transformer core includes multiple thin amorphous band-like iron sheets which are concentrically stacked around at least one center axis. A lower yoke section, an upper yoke section, and at least two limb sections are formed. The transformer core includes a modular plate-like support structure which is affixed upright to the center axis on both face sides of the lower yoke section and on both face sides of each limb section such that neighbored iron sheets are affixed together at their outer edge. The modular plate-like support structure includes, for each face side of the corresponding core sections, at least two plate-like modules, which are each connected to each other by a first or second plug-in connection.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: February 17, 2015
    Assignee: ABB Technology AG
    Inventors: Daniel Schäfer, Seung-Chul Lee, Jong-Yun Lim, Jens Tepper, Burak Esenlik, Benjamin Weber, Jasmin Smajic, Bernhard Petermeier
  • Publication number: 20150041916
    Abstract: A co-implant concentration of a source region of a pull-down transistor is higher than those of other co-implant concentrations. Thus, dopants in a halo region of the source region may be prevented from excessively being diffused into a channel region during a post annealing process. As a result, dispersion of saturation threshold voltages of unit memory cells may be reduced.
    Type: Application
    Filed: August 8, 2013
    Publication date: February 12, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cheong Sik YU, Cheolhwyi BAE, JeeHoo PARK, Seung Chul LEE
  • Publication number: 20140331461
    Abstract: A safety pin for fastening accessories includes a base part having a body in a longitudinal direction; a pin fastening part which is coupled to one end of the base part, and to which at least one pin extended in the longitudinal direction of the base part is fastened; a pin coupling part which is coupled to the other end of the base part, and which has a pin coupling groove to which the pin of the pin fastening part is inserted and coupled; and a loop button part which is coupled to the pin fastening part.
    Type: Application
    Filed: July 8, 2013
    Publication date: November 13, 2014
    Inventor: Seung-Chul Lee
  • Publication number: 20140326863
    Abstract: The optical encoder according to the present disclosure includes a light receiving part formed with a plurality of first patterns, and a scale formed with second patterns and moving relative to the light receiving part, wherein at least one of the first pattern and the second pattern is formed in a bent band shape to obtain an electric signal of reliable sinusoidal wave shape.
    Type: Application
    Filed: May 29, 2014
    Publication date: November 6, 2014
    Applicant: RS Automation Co., Ltd.
    Inventors: In Kwang CHOI, Seung Chul LEE, Sang Hoon LEE, Hyun Jung KIM
  • Patent number: 8860894
    Abstract: An electric field driven liquid crystal lens including a first substrate and a second substrate arranged opposite each other, a first plurality of split electrodes formed on the first substrate, each of the first plurality of split electrodes corresponding to one of a plurality of lens regions, a second plurality of split electrodes formed on the first plurality of split electrodes, each of the second plurality of split electrodes corresponding to one of the plurality of lens regions, a second electrode formed over an entire first surface of the second substrate, a first alignment film formed over an entire surface of the first substrate including the first and second plurality of split electrodes, the first alignment film having a first rubbing direction, a liquid crystal layer disposed between the first substrate and the second substrate, and a polarizer plate formed on a second surface of the second substrate, the polarizer plate having a transmission axis that is in a range of ±10 degrees from the first r
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: October 14, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Sung-Woo Kim, Seung-Chul Lee
  • Publication number: 20140244006
    Abstract: An apparatus and a method for monitoring the operating statuses of facilities on the basis of graphical sector representation, which represent the operating status of facilities such as a plant or a building in a fan-shaped graphical representation in which sectors on a concentric circle are represented using the size of radius, different colors, and color tones. A data collection unit collects information and data required for monitoring the operating statuses of plurality of facilities. An operating status-determining unit determines the operating statuses of the facilities using the information and data transmitted from the data collection unit. A user interface unit divides a chart shaped as a concentric circle into sectors corresponding to various operating statuses of the facilities to be monitored, and represents each operating status of the facilities in a fan-shaped graphical representation extending from the center of a concentric circle serving as an origin.
    Type: Application
    Filed: June 10, 2013
    Publication date: August 28, 2014
    Inventor: Seung-Chul Lee
  • Publication number: 20140225792
    Abstract: Disclosed is an antenna in which certain radiators are shared for multiple frequency bands. The antenna may include at least one first radiator for a first frequency band; one or more second radiator for a second frequency band; and a third radiator. Here, the third radiator may be used when realizing the first frequency band and may also be used when realizing the second frequency band.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 14, 2014
    Applicant: ACE TECHNOLOGIES CORPORATION
    Inventors: Seung-Cheol Lee, Seung-Chul Lee
  • Patent number: 8785038
    Abstract: A negative electrode active material and a secondary battery are provided. The negative electrode active material can be useful in maintaining excellent cell efficiency and lifespan while showing high-capacity properties, and the secondary battery may be manufactured using the negative electrode active material.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: July 22, 2014
    Assignee: Iljin Electric Co., Ltd.
    Inventors: Jae Woong Kim, Seung Chul Lee, Ki Duck Park, Chul Gyu Bae, Jong Goo Kang, Yoon Seong Cho
  • Patent number: 8753285
    Abstract: An ECG sensing apparatus and a method for removing a baseline drift in the clothing are provided. The ECG sensing apparatus filters ECG signals and filters a baseline drift noise which is caused by human body's motion and breathing. Accordingly, the baseline drift in the sensing apparatus is minimized even if there is a free motion.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: June 17, 2014
    Assignee: Korea Electronics Technology Institute
    Inventors: Young Hwan Kim, Jae Gi Son, Dong Sun Kim, Seung Chul Lee
  • Publication number: 20140100465
    Abstract: An ECG sensing apparatus and a method for removing a baseline drift in the clothing are provided. The ECG sensing apparatus filters ECG signals and filters a baseline drift noise which is caused by human body's motion and breathing. Accordingly, the baseline drift in the sensing apparatus is minimized even if there is a free motion.
    Type: Application
    Filed: September 12, 2013
    Publication date: April 10, 2014
    Applicant: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
    Inventors: Young Hwan KIM, Jae Gi SON, Dong Sun KIM, Seung Chul LEE
  • Patent number: 8654585
    Abstract: An integrated circuit includes a NAND string including a string selection transistor SST and a ground selection transistor GST disposed at either end of series-connected memory storage cells MC. Each of the memory storage cells is a memory transistor having a floating gate, and at least one of the string selection transistor SST and the ground selection transistor GST is a memory transistor having a floating gate. The threshold voltage Vth of programmable string selection transistors SST and the ground selection transistor GST is variable and user controllable and need not be established by implantation during manufacture. Each of the programmable string selection transistors SST and the ground selection transistors GST in a memory block may be used to store random data, thus increasing the memory storage capacity of the flash memory device.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: February 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Yean Oh, Woon-Kyung Lee, Seung-Chul Lee
  • Patent number: 8629752
    Abstract: This invention relates to a suppressor, including an element having sheets printed with a first internal electrode and a second internal electrode, and a discharge material disposed in a gap between the first internal electrode and the second internal electrode, wherein the discharge material is composed of a SiC—ZnO-based component, in which ZnO is reacted with the surface of SiC, thereby imparting much higher insulating properties and improving ESD resistance.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: January 14, 2014
    Assignee: Amotech Co., Ltd.
    Inventors: Jun-Hwan Jeong, Seung-Chul Lee, Yeon-Soo Chung, Gug-Ho Yoon
  • Publication number: 20130328133
    Abstract: Integrated circuit device with transistors having different threshold voltages and methods of forming the device are provided. The device may include the first, second and third transistors having threshold voltages different from each other. The first transistor may be free of a stacking fault and the second transistor may include a stacking fault. The concentration of the channel implant region of the third transistor may be different from the concentration of the channel implant region of the first transistor.
    Type: Application
    Filed: March 15, 2013
    Publication date: December 12, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seung-Hyun Song, Seung-Chul Lee, In-Kook Jang
  • Publication number: 20130221447
    Abstract: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
    Type: Application
    Filed: January 30, 2013
    Publication date: August 29, 2013
    Inventors: Choong-Ho Lee, Donggu Yi, Seung Chul Lee, Hyungsuk Lee, Seonah Nam, Changwoo Oh, Jongwook Lee, Song-Yi Han
  • Publication number: 20130149830
    Abstract: Methods of forming field effect transistors include selectively etching source and drain region trenches into a semiconductor region using a gate electrode as an etching mask. An epitaxial growth process is performed to fill the source and drain region trenches. Silicon germanium (SiGe) source and drain regions may be formed using an epitaxial growth process. During this growth process, the bottoms and sidewalls of the trenches may be used as “seeds” for the silicon germanium growth. An epitaxial growth step may then be performed to define silicon capping layers on the SiGe source and drain regions.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 13, 2013
    Inventors: Hwa-Sung RHEE, Seung-Chul Lee, Chul-Wan An, Henry K. Utomo, Seong-Dong Kim
  • Publication number: 20130130101
    Abstract: A negative electrode active material and a secondary battery are provided. The negative electrode active material can be useful in maintaining excellent cell efficiency and lifespan while showing high-capacity properties, and the secondary battery may be manufactured using the negative electrode active material.
    Type: Application
    Filed: November 19, 2010
    Publication date: May 23, 2013
    Inventors: Jae Woong Kim, Seung Chul Lee, Ki Duck Park, Chul Gyu Bae, Jong Goo Kang, Yoon Seong Cho
  • Publication number: 20130015942
    Abstract: This invention relates to a suppressor, including an element having sheets printed with a first internal electrode and a second internal electrode, and a discharge material disposed in a gap between the first internal electrode and the second internal electrode, wherein the discharge material is composed of a SiC—ZnO-based component, in which ZnO is reacted with the surface of SiC, thereby imparting much higher insulating properties and improving ESD resistance.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 17, 2013
    Applicant: AMOTECH CO., LTD.
    Inventors: Jun-Hwan JEONG, Seung-Chul LEE, Yeon-Soo CHUNG, Gug-Ho YOON
  • Publication number: 20120326277
    Abstract: A power semiconductor device and a manufacturing method thereof are provided. The method of manufacturing a power semiconductor device includes the steps: (a) forming a cell structure on a first conductivity type semiconductor substrate; (b) implanting second conductivity type ions onto the rear surface of the first conductivity type semiconductor substrate and activating to form an electrode region; and (c) implanting ions creating first conductivity type with a doping concentration higher than that of the semiconductor substrate and activating to form a high-concentration ion implanted region at a position below the cell structure and on the electrode region. Accordingly, it is possible to form a field stop layer regardless of conditions for forming an electrode region (for example, a P-type collector region) and thus to optimize stable breakdown voltage characteristics and device characteristics.
    Type: Application
    Filed: April 20, 2012
    Publication date: December 27, 2012
    Inventors: Seung-Chul LEE, Eun-Taek KIM
  • Publication number: 20120281475
    Abstract: An integrated circuit includes a NAND string including a string selection transistor SST and a ground selection transistor GST disposed at either end of series-connected memory storage cells MC. Each of the memory storage cells is a memory transistor having a floating gate, and at least one of the string selection transistor SST and the ground selection transistor GST is a memory transistor having a floating gate. The threshold voltage Vth of programmable string selection transistors SST and the ground selection transistor GST is variable and user controllable and need not be established by implantation during manufacture. Each of the programmable string selection transistors SST and the ground selection transistors GST in a memory block may be used to store random data, thus increasing the memory storage capacity of the flash memory device.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 8, 2012
    Inventors: Dong-Yean Oh, Woon-Kyung Lee, Seung-Chul Lee
  • Patent number: 8243518
    Abstract: An integrated circuit includes a NAND string including a string selection transistor SST and a ground selection transistor GST disposed at either end of series-connected memory storage cells MC. Each of the memory storage cells is a memory transistor having a floating gate, and at least one of the string selection transistor SST and the ground selection transistor GST is a memory transistor having a floating gate. The threshold voltage Vth of programmable string selection transistors SST and the ground selection transistor GST is variable and user controllable and need not be established by implantation during manufacture. Each of the programmable string selection transistors SST and the ground selection transistors GST in a memory block may be used to store random data, thus increasing the memory storage capacity of the flash memory device.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: August 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Yean Oh, Woon-Kyung Lee, Seung-Chul Lee