Patents by Inventor Seung-Eon Ahn

Seung-Eon Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080121864
    Abstract: Example embodiments relate to a resistive random access memory (RRAM) and a method of manufacturing the RRAM. A RRAM according to example embodiments may include a lower electrode, which may be formed on a lower structure (e.g., substrate). A resistive layer may be formed on the lower electrode, wherein the resistive layer may include a transition metal dopant. An upper electrode may be formed on the resistive layer. Accordingly, the transition metal dopant may form a filament in the resistive layer that operates as a current path.
    Type: Application
    Filed: November 28, 2007
    Publication date: May 29, 2008
    Inventors: Sun-ae Seo, Young-soo Park, Ran-ju Jung, Myoung-jae Lee, Dong-chul Kim, Seung-eon Ahn
  • Publication number: 20080121865
    Abstract: A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a middle electrode disposed on the resistor structure, a diode structure disposed on the middle electrode, and an upper electrode disposed on the diode structure. A nonvolatile memory device wherein the resistor structure includes one resistor and the diode structure includes one diode. An array of nonvolatile memory device as described above.
    Type: Application
    Filed: November 2, 2007
    Publication date: May 29, 2008
    Inventors: Seung-Eon Ahn, In-Kyeong Yoo, Young-Soo Joung, Young-Kwan Cha, Myoung-Jae Lee, David Seo, Sun-Ae Seo
  • Publication number: 20080116438
    Abstract: A resistive random access memory (RRAM) having a solid solution layer and a method of manufacturing the RRAM are provided. The RRAM includes a lower electrode, a solid solution layer on the lower electrode, a resistive layer on the solid solution layer, and an upper electrode on the resistive layer. The method of manufacturing the RRAM includes forming a lower electrode, forming a solid solution layer on the lower electrode, forming a resistive layer on the solid layer and forming an upper electrode on the resistive layer, wherein the RRAM is formed of a transition metal solid solution.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Inventors: Myoung-jae Lee, Young-soo Park, Ran-ju Jung, Sun-ae Seo, Dong-chul Kim, Seung-eon Ahn
  • Publication number: 20080013363
    Abstract: A threshold switching operation method of a nonvolatile memory device may be provided. In the threshold switching operation method of a nonvolatile memory a pulse voltage may be supplied to a metal oxide layer of the nonvolatile memory device. Accordingly, it may be possible to operate the nonvolatile memory device at a lower voltage with lower threshold switching current.
    Type: Application
    Filed: May 24, 2007
    Publication date: January 17, 2008
    Inventors: Dong-chul Kim, In-gyu Baek, Dong-seok Suh, Myoung-Jae Lee, Seung-eon Ahn
  • Publication number: 20080012064
    Abstract: Provided is a nonvolatile memory device and method of operating and fabricating the same for higher integration and higher speed, while allowing for a lower operating current. The nonvolatile memory device may include a semiconductor substrate. Resistive layers each storing a variable resistive state may be formed on the surface of the semiconductor substrate. Buried electrodes may be formed on the semiconductor substrate under the resistive layers and may connect to the resistive layers. Channel regions may be formed on the surface of the semiconductor substrate and connect adjacent resistive layers to each other, but not to the buried electrodes. Gate insulating layers may be formed on the channel regions of the semiconductor substrate. Gate electrodes may be formed on the gate insulating layers and extend over the resistive layers.
    Type: Application
    Filed: March 15, 2007
    Publication date: January 17, 2008
    Inventors: Yoon-dong Park, Myoung-jae Lee, Dong-chul Kim, Seung-eon Ahn
  • Publication number: 20080007988
    Abstract: Provided is a non-volatile memory device including a variable resistance material and method of fabricating the same. The non-volatile memory device may include a lower electrode, an intermediate layer on the lower electrode including one material selected from the group consisting of HfO, ZnO, InZnO, and ITO, a variable resistance material layer on the intermediate layer, and an upper electrode on the variable resistance material layer. A memory device having multi-level bipolar switching characteristics based upon the size of the device may be provided.
    Type: Application
    Filed: May 24, 2007
    Publication date: January 10, 2008
    Inventors: Seung-Eon Ahn, Myoung-Jae Lee, Dong-Chul Kim
  • Publication number: 20070205456
    Abstract: A nonvolatile memory device having self-presence diode characteristics, and/or a nonvolatile memory array including the nonvolatile memory device may be provided. The nonvolatile memory device may include a lower electrode, a first semiconductor oxide layer on the lower electrode, a second semiconductor oxide layer on the first semiconductor oxide layer, and/or an upper electrode on the second semiconductor oxide layer.
    Type: Application
    Filed: February 28, 2007
    Publication date: September 6, 2007
    Inventors: Myoung-Jae Lee, In-Kyeong Yoo, Eun-Hong Lee, Jong-Wan Kim, Dong-Chul Kim, Seung-Eon Ahn
  • Publication number: 20070159869
    Abstract: A multi-bit memory cell stores information corresponding to a high resistive state and multiple other resistive states lower than the high resistive state. A resistance of a memory element within the multi-bit memory cell switches from the high resistive state to one of the other multiple resistive states by applying a corresponding current to the memory element.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 12, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In-Gyu Baek, Dong-Chul Kim, Jang-Eun Lee, Myoung-Jae Lee, Sun-Ae Seo, Hyeong-Jun Kim, Seung-Eon Ahn, Eun-Kyung Yim
  • Publication number: 20070120580
    Abstract: A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.
    Type: Application
    Filed: April 14, 2006
    Publication date: May 31, 2007
    Inventors: Dong Kim, In-kyeong Yoo, Myoung-jae Lee, Sun-ae Seo, In-gyu Baek, Seung-eon Ahn, Byoung-ho Park, Young-kwan Cha, Sang-jin Park
  • Publication number: 20070052001
    Abstract: A nonvolatile semiconductor memory device and a method of fabricating the same are provided. The nonvolatile memory device may include a switching device and a storage node connected to the switching device. The storage node may comprise a lower electrode, a data storing layer, and an upper electrode. The data storing layer may include a first region where a current path is formed at a first voltage, and a second region surrounding the first region where a current path is formed at a second voltage, greater than the first voltage. The first region may be positioned to contact the upper electrode and the lower electrode.
    Type: Application
    Filed: August 11, 2006
    Publication date: March 8, 2007
    Inventors: Seung-eon Ahn, Jung-bin Yun, In-kyeong Yoo, Dong-chul Kim, Tae-hoon Kim
  • Publication number: 20070037351
    Abstract: Example embodiments relate to a method of fabricating a memory device and a memory device. The method of fabricating a memory device comprises forming a lower electrode and an oxide layer on a lower structure and radiating an energy beam on a region of the oxide layer. The memory device comprises a lower structure and an oxide layer and a lower structure formed on the lower structure, the oxide layer including an electron beam radiation region that received radiation from an electron beam source creating an artificially formed current path through the oxide layer to the lower electrode. A reset current of the memory device may be decreased and stabilized.
    Type: Application
    Filed: August 10, 2006
    Publication date: February 15, 2007
    Inventors: Seung-eon Ahn, Hye-young Kim, Byoung-ho Park, Jung-bin Yun, You-seon Kim
  • Publication number: 20060193175
    Abstract: The nonvolatile memory device includes a semiconductor substrate on which a source, a drain, and a channel region are formed, a tunneling oxide film formed on the channel region, a floating gate formed of a transition metal oxide (TMO) on the tunneling oxide, a blocking oxide film formed on the floating gate, a gate electrode formed on the blocking oxide film.
    Type: Application
    Filed: February 15, 2006
    Publication date: August 31, 2006
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoon-ho Khang, Eun-hye Lee, Myoung-jae Lee, Sun-ae Seo, Seung-Eon Ahn
  • Publication number: 20060131554
    Abstract: A nonvolatile memory device having two or more resistors and methods of forming and using the same. A nonvolatile memory device having two resistance layers, and more particularly, to a nonvolatile memory device formed and operated using a resistance layer having memory switching characteristics and a resistance layer having threshold switching characteristics. The nonvolatile semiconductor memory device may include a lower electrode; a first resistance layer having at least two resistance characteristics formed on the lower electrode, a second resistance layer having threshold switching characteristics formed on the first resistance layer, and an upper electrode formed on the second resistance layer.
    Type: Application
    Filed: December 21, 2005
    Publication date: June 22, 2006
    Inventors: Young-Soo Joung, Yoon-Dong Park, In-Kyeong Yoo, Myoung-Jae Lee, Sun-Ae Seo, Hye-Young Kim, Seung-Eon Ahn, David Seo
  • Publication number: 20060098472
    Abstract: A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a diode structure disposed on the resistor structure, and an upper electrode disposed on the diode structure. A nonvolatile memory device wherein the resistor structure includes one resistor and the diode structure includes one diode. An array of nonvolatile memory devices as described above.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 11, 2006
    Inventors: Seung-Eon Ahn, In-Kyeong Yoo, Young-Soo Joung, Young-Kwan Cha, Myoung-Jae Lee, David Seo, Sun-Ae Seo