Patents by Inventor Seung-Han Ok

Seung-Han Ok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230313120
    Abstract: The present application relates to a composition for freeze-preserving microalgae belonging to the family Thraustochytriaceae and a method for freeze-preserving microalgae belonging to the family Thraustochytriaceae using same. By the composition for freeze-preserving microalgae belonging to the family Thraustochytriaceae according to an aspect and the method for freeze-preserving microalgae belonging to the family Thraustochytriaceae using same, the microalgae may be stored stably for a long period of time, and the costs for preservation of the microalgae may be reduced by shortening a process. In addition, according to a method for preparing freeze-dried biomass of microalgae belonging to the family Thraustochytriaceae using the composition, even during long-term storage at room temperature, freeze-dried biomass in the form of powder that can maintain bacterial activity and is easy for storage and transportation may be manufactured through a simple process.
    Type: Application
    Filed: October 1, 2021
    Publication date: October 5, 2023
    Applicant: CJ CHEILJEDANG CORPORATION
    Inventors: Sung Hoon Jang, Won Sub Shin, Jung Woon Choi, Hae Won Kang, Ji Young Kim, Seung Han Ok, Ho Sun Jang, Jong Min Kim, Jin Ho Lee, Dae Cheol Kim
  • Publication number: 20170269626
    Abstract: A reference voltage generator includes a constant voltage generator suitable for using a high voltage as a first power supply voltage and for generating a constant voltage, and a first reference voltage generating unit suitable for using the constant voltage as a second power supply voltage and for generating a first reference voltage.
    Type: Application
    Filed: June 7, 2017
    Publication date: September 21, 2017
    Inventor: Seung-Han OK
  • Patent number: 9455692
    Abstract: A semiconductor device may include a control signal generation block configured to shift a level of a trimming signal and generate a selection control signal, and shift a level of a first enable signal and generate a driving control signal, when an internal voltage is raised to a level greater than a sensing reference voltage after an initialization period is ended. The semiconductor device may include an internal voltage generation block configured to select one of a plurality of trimming division voltages as a selected reference voltage in response to the selection control signal, and drive the internal voltage by comparing levels of the selected reference voltage and the internal voltage in response to the driving control signal.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: September 27, 2016
    Assignee: SK hynix Inc.
    Inventor: Seung Han Ok
  • Publication number: 20160195889
    Abstract: A semiconductor device may include an internal voltage generation circuit including at least one resistor element and a plurality of MOS transistors, and configured to change amounts of current flowing through the plurality of MOS transistors according to a level of the first node and control driving of an internal voltage. The semiconductor device may include an internal circuit configured to operate by being supplied with the internal voltage. The at least one resistor element is electrically coupled between the internal voltage and a first node. The plurality of MOS transistors are electrically coupled between the at least one resistor element and a power supply voltage.
    Type: Application
    Filed: May 19, 2015
    Publication date: July 7, 2016
    Inventor: Seung Han OK
  • Publication number: 20160182025
    Abstract: A semiconductor device may include a control signal generation block configured to shift a level of a trimming signal and generate a selection control signal, and shift a level of a first enable signal and generate a driving control signal, when an internal voltage is raised to a level greater than a sensing reference voltage after an initialization period is ended. The semiconductor device may include an internal voltage generation block configured to select one of a plurality of trimming division voltages as a selected reference voltage in response to the selection control signal, and drive the internal voltage by comparing levels of the selected reference voltage and the internal voltage in response to the driving control signal.
    Type: Application
    Filed: May 19, 2015
    Publication date: June 23, 2016
    Inventor: Seung Han OK
  • Patent number: 9274539
    Abstract: A voltage trimming circuit of a semiconductor apparatus includes: a first voltage trimming unit configured to trim a first reference voltage having a first characteristic with respect to temperature based on a first trimming signal, and generate a first trimming reference voltage; a second voltage trimming unit configured to trim a second reference voltage having a second characteristic with respect to the temperature based on a second trimming signal, and generate a second trimming reference voltage; and an adjusting unit configured to trim a voltage formed from a potential difference between the first and second trimming reference voltages based on a select signal, and generate a final trimming reference voltage.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: March 1, 2016
    Assignee: SK Hynix Inc.
    Inventor: Seung Han Ok
  • Patent number: 9046551
    Abstract: A voltage detection circuit includes a voltage detection unit suitable for comparing a voltage level of a reference voltage terminal with a voltage level of an internal voltage terminal and for generating a detection signal based on a comparison result, a test reference voltage generating unit suitable for receiving an external reference voltage through a pad and for supplying a test reference voltage, which is generated by using the received external reference voltage, to the reference voltage terminal by using a first input resistance, during a test operation, and a normal reference voltage generating unit having a current mirror structure, wherein the normal reference voltage generating unit is suitable for supplying a current, corresponding to an internal reference voltage, to the reference voltage terminal by using a second input resistance different from the first input resistance, during a normal operation.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: June 2, 2015
    Assignee: SK Hynix Inc.
    Inventor: Seung-Han Ok
  • Publication number: 20140368180
    Abstract: A reference voltage generator includes a constant voltage generator suitable for using a high voltage as a first power supply voltage and for generating a constant voltage, and a first reference voltage generating unit suitable for using the constant voltage as a second power supply voltage and for generating a first reference voltage.
    Type: Application
    Filed: October 4, 2013
    Publication date: December 18, 2014
    Applicant: SK hynix Inc.
    Inventor: Seung-Han OK
  • Publication number: 20140368263
    Abstract: A voltage detection circuit includes a voltage detection unit suitable for comparing a voltage level of a reference voltage terminal with a voltage level of an internal voltage terminal and for generating a detection signal based on a comparison result, a test reference voltage generating unit suitable for receiving an external reference voltage through a pad and for supplying the received external reference voltage to the reference voltage terminal as the reference voltage by using a first input resistance, during a test operation, and a normal reference voltage generating unit having a current mirror structure, wherein the normal reference voltage generating unit is suitable for generating an internal reference voltage, and for supplying the internal reference voltage to the reference voltage terminal as the reference voltage by using a second input resistance different from the first input resistance, during a normal operation.
    Type: Application
    Filed: November 21, 2013
    Publication date: December 18, 2014
    Applicant: SK hynix Inc.
    Inventor: Seung-Han OK
  • Publication number: 20140062452
    Abstract: A voltage trimming circuit of a semiconductor apparatus includes: a first voltage trimming unit configured to trim a first reference voltage having a first characteristic with respect to temperature based on a first trimming signal, and generate a first trimming reference voltage; a second voltage trimming unit configured to trim a second reference voltage having a second characteristic with respect to the temperature based on a second trimming signal, and generate a second trimming reference voltage; and an adjusting unit configured to trim a voltage formed from a potential difference between the first and second trimming reference voltages based on a select signal, and generate a final trimming reference voltage.
    Type: Application
    Filed: December 19, 2012
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventor: Seung Han OK
  • Patent number: 7368266
    Abstract: A method for producing L-threonine using a microorganism is provided. In the method, additional one or more copies of each of the phosphoenolpyruvate carboxylase (ppc) gene and the threonine operon are integrated into a particular site of the chromosomal DNA of a microorganism, while its inherent ppc gene and threonine operon remain. Accordingly, two or more ppc genes and threonine operons are included in the chromosomal DNA of the microorganism to thereby enhance the expression of the ppc gene encoding an enzyme to convert phosphoenolpyruvate to a threonine biosynthesis precursor, oxaloacetete, and the genes encoding enzymes involved in the synthetic pathway of threonine from oxaloacetate, including thrA (aspartokinasel-homoserine dehydrogenase), thrB (homoserine kinase), and thrC (threonine synthase), thereby markedly increasing L-threonine productivity.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: May 6, 2008
    Assignee: CJ Corporation
    Inventors: Kap-Soo Noh, Yeong-Chul Kim, Jae-Yong Park, Dai-Chul Kim, Jin-Ho Lee, Seung-Han Ok
  • Patent number: 7011961
    Abstract: A method of producing L-threonine using a microorganism is provided, one or more copies of each of the phosphoenolpyruvate carboxylase gene and the threonine operon are additionally intedgrated into a particular site of the chromosomal DNA of the microorganism, whiel its inherent phophoenolpyruvate carboxylase gene and threonine operon remain.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: March 14, 2006
    Assignee: Cheil Jedang Corporation
    Inventors: Kap-Soo Noh, Yeong-Chul Kim, Jae-Yong Park, Dai-Chul Kim, Jin-Ho Lee, Seung-Han Ok
  • Publication number: 20050136518
    Abstract: A method for producing L-threonine using a microorganism is provided. In the method, additional one or more copies of each of the phosphoenolpyruvate carboxylase (ppc) gene and the threonine operon are integrated into a particular site of the chromosomal DNA of a microorganism, while its inherent ppc gene and threonine operon remain. Accordingly, two or more ppc genes and threonine operons are included in the chromosomal DNA of the microorganism to thereby enhance the expression of the ppc gene encoding an enzyme to convert phosphoenolpyruvate to a threonine biosynthesis precursor, oxaloacetete, and the genes encoding enzymes involved in the synthetic pathway of threonine from oxaloacetate, including thrA (aspartokinasel-homoserine dehydrogenase), thrB (homoserine kinase), and thrC (threonine synthase), thereby markedly increasing L-threonine productivity.
    Type: Application
    Filed: February 1, 2005
    Publication date: June 23, 2005
    Inventors: Kap-Soo Noh, Yeong-Chul Kim, Jae-Yong Park, Dai-Chul Kim, Jin-Ho Lee, Seung-Han Ok
  • Patent number: 6693832
    Abstract: Disclosed is an improved register circuit of an extended mode register set. The register circuit comprises a first mode register block reset by a reset signal and outputting a predetermined level of signal in the input of an extended mode register set signal; a logic block for generating an output signal by OR operation of the reset signal and the mode register set signal and masking the mode register set signal when the predetermined level of signal is inputted from the first mode register block; and a second mode register block reset by output signal of the logic block.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: February 17, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Han Ok
  • Publication number: 20030153057
    Abstract: A method for producing L-threonine using a microorganism is provided. In the method, additional one or more copies of each of the phosphoenolpyruvate carboxylase (ppc) gene and the threonine operon are integrated into a particular site of the chromosomal DNA of a microorganism, while its inherent ppc gene and threonine operon remain. Accordingly, two or more ppc genes and threonine operons are included in the chromosomal DNA of the microorganism to thereby enhance the expression of the ppc gene encoding an enzyme to convert phosphoenolpyruvate to a threonine biosynthesis precursor, oxaloacetete, and the genes encoding enzymes involved in the synthetic pathway of threonine from oxaloacetate, including thrA (aspartokinasel-homoserine dehydrogenase), thrB (homoserine kinase), and thrC (threonine synthase), thereby markedly increasing L-threonine productivity.
    Type: Application
    Filed: October 11, 2002
    Publication date: August 14, 2003
    Inventors: Kap-Soo Noh, Yeong-Chul Kim, Jae-Yong Park, Dai-Chul Kim, Jin-Ho Lee, Seung-Han Ok
  • Publication number: 20030090359
    Abstract: Disclosed is an improved register circuit of an extended mode register set. The register circuit comprises a first mode register block reset by a reset signal and outputting a predetermined level of signal in the input of an extended mode register set signal; a logic block for generating an output signal by OR operation of the reset signal and the mode register set signal and masking the mode register set signal when the predetermined level of signal is inputted from the first mode register block; and a second mode register block reset by output signal of the logic block.
    Type: Application
    Filed: September 25, 2002
    Publication date: May 15, 2003
    Inventor: Seung Han Ok
  • Patent number: 6518831
    Abstract: A boosting circuit for a high voltage operation in a semiconductor memory device for preventing a transistor of a high voltage pump circuit from being destroyed due to an excessive bootstrap voltage in a pumping operation, by controlling the operation of the high voltage pump circuit according to a signal detecting that the bootstrap voltage of the high voltage pump circuit has increased above a predetermined level.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: February 11, 2003
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Do Hur, Seung Han Ok