Abstract: Forms of the present disclosure include an input end, and an output end connected to the input end to improve a power factor through the input end. The output end includes non-electrolytic capacitors formed at both sides of an electrolytic capacitor for output, and first inductors formed between the respective non-electrolytic capacitors and the electrolytic capacitor. Therefore, forms of the present disclosure may reduce a ripple current (current stress) at a PFC output end through a CL circuit formed at a left side with respect to the electrolytic capacitor, and reduce an input ripple current (input current stress) of a DC-DC converter through an LC circuit formed at a right side.

Abstract: An inverter for driving a motor of a vehicle mediating between a battery and a driving motor is disclosed. The inverter includes a power storage module, a power module, and a cooling module. The power storage module is configured to be supplied with power from the battery. The power module is configured to be supplied with power from the power storage module to transfer the power to the driving motor. The cooling module is configured to be installed between the power storage module and the power module to simultaneously cool the power storage module and the power module.

Abstract: An inverter for driving a motor of a vehicle mediating between a battery and a driving motor is disclosed. The inverter includes a power storage module, a power module, and a cooling module. The power storage module is configured to be supplied with power from the battery. The power module is configured to be supplied with power from the power storage module to transfer the power to the driving motor. The cooling module is configured to be installed between the power storage module and the power module to simultaneously cool the power storage module and the power module.

Abstract: A non-volatile memory device according to example embodiments includes at least one NAND flash memory and a memory controller configured to control the NAND flash memory. The memory controller comprises a bit counter configured to count a number of first binary digit of each of first to N-th readout page data, the first to N-th readout page data being respectively read by first to N-th test read voltages, a register configured to store first to N-th count values with respect to the first to N-th readout page data output from the bit counter, and a read voltage adjuster configured to compare the first to N-th count values to determine a read voltage, where N is an integer greater than 1.

Abstract: The present invention relates to a bone regeneration or bone formation promoting pharmaceutical composition comprising muramyl dipeptide, an analog thereof, a derivative thereof or a pharmaceutically acceptable salt thereof. In contrast to existing passive therapeutic agents which center on bone absorption suppression based on mechanisms for reducing osteoclast functionality, the composition comprising muramyl dipeptide of the present invention promotes the differentiation of osteoblasts, which are bone forming cells, and can advantageously be used in various diseases where bone formation is required as an active therapeutic agent that does not affect osteoclast.

Abstract: The present invention relates to a method of purifying yellow phosphorus, and more particularly, to a method of effectively removing impurities from yellow phosphorus used as raw materials of a phosphoric acid to increase purity of the phosphoric acid, the method including: removing impurities from the phosphoric acid by adding an oxidizing agent to the yellow phosphorus, followed by stirring; and adding a solution including an additive having a specific functional group in a chemical structure to the yellow phosphorus from which the impurities are removed, followed by stirring.

Abstract: Forms of the present disclosure include an input end, and an output end connected to the input end to improve a power factor through the input end. The output end includes non-electrolytic capacitors formed at both sides of an electrolytic capacitor for output, and first inductors formed between the respective non-electrolytic capacitors and the electrolytic capacitor. Therefore, forms of the present disclosure may reduce a ripple current (current stress) at a PFC output end through a CL circuit formed at a left side with respect to the electrolytic capacitor, and reduce an input ripple current (input current stress) of a DC-DC converter through an LC circuit formed at a right side.

Abstract: A capacitor module of an inverter for a vehicle includes: a DC-link capacitor configured to be connected in parallel to an input of an inverter between a first high voltage input terminal and a second high voltage input terminal; and a plurality of Y-capacitors configured to be connected in parallel to the inverter. Each of the plurality Y-capacitors includes a first capacitor element connected between the first high voltage input terminal and a ground bus bar and a second capacitor element connected between the second high voltage input terminal and the ground bus bar, and the ground bus bars of the plurality of Y-capacitors are separately provided and the ground holes of the ground bus bars are disposed so as to face each other in a first direction.

Abstract: A method for changing a capacitance value of an output capacitor of a power factor corrector (PFC) includes applying AC power to a power conversion circuit. It is sensed whether an instantaneous power failure occurs in the AC power. Output capacitors of the PFC of the power conversion circuit are connected in parallel to each other to increase capacitance values of the output capacitors, when it is sensed that the instantaneous power failure does not occur in the AC power.

Abstract: A method of adjusting read voltages for a NAND flash memory device includes an operation of reading first page data from a first page corresponding to a paired page of a second page, an operation of simultaneously changing the first test read voltage and the third test read voltage to read second page data from a second page, an operation of performing a bitwise operation on the first page data and the second page data an operation of counting a number of memory cells corresponding to a first threshold voltage state and a fourth threshold voltage state by using a result of the bitwise operation, and an operation of setting a first read voltage and a third read voltage as a voltage corresponding to a section in which a change in the number of memory cells is a lowest value.

Abstract: A non-volatile memory device according to example embodiments includes at least one NAND flash memory and a memory controller configured to control the NAND flash memory. The memory controller comprises a bit counter configured to count a number of first binary digit of each of first to N-th readout page data, the first to N-th readout page data being respectively read by first to N-th test read voltages, a register configured to store first to N-th count values with respect to the first to N-th readout page data output from the bit counter, and a read voltage adjuster configured to compare the first to N-th count values to determine a read voltage, where N is an integer greater than 1.

Abstract: A method of adjusting read voltages for a NAND flash memory device includes an operation of reading first page data from a first page corresponding to a paired page of a second page, an operation of simultaneously changing the first test read voltage and the third test read voltage to read second page data from a second page, an operation of performing a bitwise operation on the first page data and the second page data an operation of counting a number of memory cells corresponding to a first threshold voltage state and a fourth threshold voltage state by using a result of the bitwise operation, and an operation of setting a first read voltage and a third read voltage as a voltage corresponding to a section in which a change in the number of memory cells is a lowest value.

Abstract: The present invention relates to a method of purifying yellow phosphorus, and more particularly, to a method of effectively removing impurities from yellow phosphorus used as raw materials of a phosphoric acid to increase purity of the phosphoric acid, the method including: removing impurities from the phosphoric acid by adding an oxidizing agent to the yellow phosphorus, followed by stirring; and adding a solution including an additive having a specific functional group in a chemical structure to the yellow phosphorus from which the impurities are removed, followed by stirring.

Abstract: A capacitor module of an inverter for a vehicle includes: a DC-link capacitor configured to be connected in parallel to an input of an inverter between a first high voltage input terminal and a second high voltage input terminal; and a plurality of Y-capacitors configured to be connected in parallel to the inverter. Each of the plurality Y-capacitors includes a first capacitor element connected between the first high voltage input terminal and a ground bus bar and a second capacitor element connected between the second high voltage input terminal and the ground bus bar, and the ground bus bars of the plurality of Y-capacitors are separately provided and the ground holes of the ground bus bars are disposed so as to face each other in a first direction.

Abstract: A storage system comprises: a storage device including a NAND flash memory and a storage controller for controlling the NAND flash memory, and a host device including a host controller for interacting with the storage controller and a file system for generating a read command or a write command for data pieces in the unit of blocks. At this time, when the read command or the write command for the data pieces is generated, the host device and the storage device transmit/receive the data pieces in the unit of data transmission corresponding to a sector size. When read data pieces are determined by the write command, the host device collects first space data pieces related to the write data pieces and transmits the first spare data pieces to the storage device first and then the write data pieces.

Abstract: The present invention relates to a method for removing metal ions in the phosphoric acid solution, and particularly to a method for removing metal ions in the phosphoric acid solution which comprises a step of passing an ion exchange resin through the acid solution to activate the ion exchange resin; a step of filling a resin tower with the activated ion exchange resin and washing it with ultra-pure water, and a step of passing the phosphoric acid solution to the washed ion exchange resin, thereby causing each individual concentration of metal ions with the oxidation number of 2 to 7 in the phosphoric acid solution to be less than 100 ppb.

Abstract: A method for changing a capacitance value of an output capacitor of a power factor corrector (PFC) includes applying AC power to a power conversion circuit. It is sensed whether an instantaneous power failure occurs in the AC power. Output capacitors of the PFC of the power conversion circuit are connected in parallel to each other to increase capacitance values of the output capacitors, when it is sensed that the instantaneous power failure does not occur in the AC power.

Abstract: The present invention relates to a bone regeneration or bone formation promoting pharmaceutical composition comprising muramyl dipeptide, an analogue thereof, a derivative thereof or a pharmaceutically acceptable salt thereof. In contrast to existing passive therapeutic agents which center on bone absorption suppression based on mechanisms for reducing osteoclast functionality, the composition comprising muramyl dipeptide of the present invention promotes the differentiation of osteoblasts, which are bone forming cells, and can advantageously be used in various diseases where bone formation is required as an active therapeutic agent that does not affect osteoclast.

Abstract: A power factor correction (PFC) circuit for a charging converter, includes an input terminal connected with an alternating-current source, and an output terminal connected with a converter. The output terminal is connected to an electrolytic capacitor, such that the PFC circuit is connected in parallel with the converter through the electrolytic capacitor. The front end of the electrolytic capacitor is connected to an LC filter.

Abstract: A memory system comprises a flash memory and a memory controller. The flash memory comprises a plurality of memory blocks. The memory controller performs a read retry operation on a memory block containing an uncorrectable read error until an accurate data value is read from the memory block. The memory controller then controls the flash memory to perform an erase refresh operation on the memory block.