Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.

Abstract: Proposed are a seat side bolster apparatus and a control method thereof. The seat side bolster apparatus of the disclosure includes a driving unit, which is provided under a foam pad of a seat cushion, is moved upwards and downwards by operation of an actuator, and presses the foam pad upwards when moving upwards, and a covering bracket, which is connected to the driving unit so as to be moved upwards and downwards together with the driving unit and to which an end of a covering enveloping the foam pad of the seat cushion is fixed.

Abstract: An intra prediction method and a device using the intra prediction method are provided. The intra prediction method includes the steps of: deriving a current prediction mode as a prediction mode of a current block; constructing neighboring samples of the current block with available reference samples; filtering the available reference samples; and generating predicted samples of the current block on the basis of the filtered available reference samples. The filtering step includes performing the filtering using the available reference sample located in the prediction direction of the current prediction mode and a predetermined number of available reference samples neighboring to the prediction direction of the current prediction mode.

Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.

Abstract: The present invention relates to an electrode shaping apparatus having a sheet transfer unit, a fixing unit, a punch unit including a center punching unit and a side punching unit, wherein the center punching unit includes a hole punching member and a notching pilot pin, the electrode shaping apparatus configured to reduce a step that may occur during notching of an electrode, and an electrode shaping method using the same.

Abstract: The present invention relates to an electrode shaping apparatus having a sheet transfer unit, a fixing unit, a punch unit including a center punching unit and a side punching unit, wherein the center punching unit includes a hole punching member and a notching pilot pin, the electrode shaping apparatus configured to reduce a step that may occur during notching of an electrode, and an electrode shaping method using the same.

Abstract: A controller system including a first controller including one or more input controls and a connector. The controller system also can include a second controller including one or more input controls and a connector. The controller system additionally can include a bridge including a first connector at a first end of the bridge, a second connector at a second end of the bridge, and one or more hub connectors between the first end and the second end of the bridge. Each of the first connector, the second connector, and the one or more hub connectors can be a first connector type. Each of the connectors of the first controller and the second controller can be a second connector type configured to connect in a positionally secure manner with the first connector type. Other embodiments are described.

Abstract: Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.

Abstract: An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

Abstract: The present invention relates to a method for quantifying and diagnosing the quality of manufacturing equipment, that is, to a quantitative diagnostic method for the quality of manufacturing equipment. It is possible to quantify the quality of manufacturing equipment having a plurality of production elements and diagnose same in a single attempt.

Abstract: Disclosed is an image sensor that includes a pixel array including first pixels sharing a first floating diffusion region and second pixels sharing a second floating diffusion region, a first analog-to-digital converter, a second analog-to-digital converter, and a switch circuit. In a first mode, the first analog-to-digital converter processes the first pixels, and the second analog-to-digital converter processes the second pixels. In the second mode, the first analog-to-digital converter processes a first image component of a pixel signal of the first pixels, and the second analog-to-digital converter processes a second image component of the pixel signal of the first pixels. An HDR image is implemented based on processing results of the first analog-to-digital converter and the second analog-to-digital converter.

Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.

Abstract: Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.

Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.

Abstract: An analog-to-digital converter configured to convert an analog signal into a digital signal includes a first converter configured to receive an input signal of an analog type, compare the input signal with a plurality of reference signals, select one of the plurality of reference signals based on the comparison, and output an upper bit that is a portion of the digital signal based on the selected reference signal, a second converter configured to perform an oversampling operation n times based on a residue signal indicating a difference between an upper analog signal corresponding to the upper bit value and the input signal and output an intermediate bit value of the digital signal corresponding to the first to n-th oversampling signals generated respectively during the oversampling operations performed n times, and a third converter configured to output a lower bit value of the digital signal corresponding to the n-th oversampling signal.

Abstract: Disclosed is an image sensor that includes a pixel array including first pixels sharing a first floating diffusion region and second pixels sharing a second floating diffusion region, a first analog-to-digital converter, a second analog-to-digital converter, and a switch circuit. In a first mode, the first analog-to-digital converter processes the first pixels, and the second analog-to-digital converter processes the second pixels. In the second mode, the first analog-to-digital converter processes a first image component of a pixel signal of the first pixels, and the second analog-to-digital converter processes a second image component of the pixel signal of the first pixels. An HDR image is implemented based on processing results of the first analog-to-digital converter and the second analog-to-digital converter.

Abstract: Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.

Abstract: An image sensor and an image processing system including the same are provided. The image sensor includes a pixel array including a plurality of pixels each connected to one of first through m-th column lines to output a pixel signal, where “m” is an integer of at least 2; analog-to-digital converters each configured to receive the pixel signal corresponding to one of the first through m-th column lines, to compare the pixel signal with a ramp signal, and to convert the pixel signal to a digital pixel signal; and a blocking circuit connected to an input terminal of at least one of the analog-to-digital converters to block an influence of an operation of others among the analog-to-digital converters.

Abstract: An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

Abstract: Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.