Patents by Inventor Seung Ju HA

Seung Ju HA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200365227
    Abstract: Provided herein is a memory device and a method of operating the memory device. The memory device may include a one or more memory blocks, one or more peripheral circuits configured to perform an erase operation and a threshold voltage distribution scan operation on a selected memory block, and a control logic configured to control the one or more peripheral circuits, and determine the selected memory block to be a normal memory block or a defective memory block based on a result of the threshold voltage distribution scan operation.
    Type: Application
    Filed: August 6, 2020
    Publication date: November 19, 2020
    Applicant: SK hynix Inc.
    Inventors: Min Ho HER, Dong Hyun KIM, Jeong Hoon PARK, Youn Ho JUNG, Seung Ju HA
  • Patent number: 10770166
    Abstract: Provided herein is a memory device and a method of operating the memory device. The memory device may include a one or more memory blocks, one or more peripheral circuits configured to perform an erase operation and a threshold voltage distribution scan operation on a selected memory block, and a control logic configured to control the one or more peripheral circuits, and determine the selected memory block to be a normal memory block or a defective memory block based on a result of the threshold voltage distribution scan operation.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: September 8, 2020
    Assignee: SK hynix Inc.
    Inventors: Min Ho Her, Dong Hyun Kim, Jeong Hoon Park, Youn Ho Jung, Seung Ju Ha
  • Publication number: 20190304563
    Abstract: Provided herein is a memory device and a method of operating the memory device. The memory device may include a one or more memory blocks, one or more peripheral circuits configured to perform an erase operation and a threshold voltage distribution scan operation on a selected memory block, and a control logic configured to control the one or more peripheral circuits, and determine the selected memory block to be a normal memory block or a defective memory block based on a result of the threshold voltage distribution scan operation.
    Type: Application
    Filed: November 19, 2018
    Publication date: October 3, 2019
    Applicant: SK hynix Inc.
    Inventors: Min Ho HER, Dong Hyun KIM, Jeong Hoon PARK, Youn Ho JUNG, Seung Ju HA