Abstract: A method of inhibiting pit occurrence on a semiconductor substrate during manufacture of a semiconductor device includes forming an isolation using a shallow trench isolation (STI) method in a semiconductor substrate, forming an insulation layer on an entire surface of the semiconductor substrate having the isolation, implanting ions into the semiconductor substrate using the insulation layer as a buffer layer, annealing the semiconductor substrate using a rapid thermal annealing (RTA) process, forming a photoresist layer on the insulation layer and then forming an opening in the photoresist layer to expose an underlayer thereof, forming an align key by etching the underlayer at the opening, and removing the photoresist layer and the insulation layer. Alternatively, the thickness of the insulation layer may be reduced to prevent the occurrence of pits on active areas of the semiconductor substrate.

Abstract: A plasma enhanced chemical vapor deposition apparatus and a method of forming a nitride layer using the same, wherein the plasma enhanced CVD apparatus includes a process chamber including an upper chamber with a dome shape, a lower chamber, and an insulator therebetween, a gas distributing ring, a susceptor for supporting a wafer and heating the process chamber, a plasma compensation ring surrounding the susceptor, a vacuum pump and an electric power source connected to the process chamber. The gas distributing ring has a plurality of upwardly inclined nozzles, allowing upward distribution of reactive gases. The method of forming a nitride layer includes forming a protective film on inner walls of a process chamber, the protective film having at least two layers of differeing dielectric constant, and sequentially supplying reactive gases to the process chamber. A nitride layer formed thereby has low hydrogen content, good density and oxidation resistance.

Abstract: In a method for forming a gate electrode having an excellent sidewall profile, after a gate structure is formed on a substrate, a first oxide film is formed on a sidewall of the gate structure and on the substrate by re-oxidizing the gate structure and the substrate under an atmosphere including an oxygen gas and an inert gas. The gate structure has a gate oxide film pattern, a polysilicon film pattern and a metal silicide film pattern. A portion of the first oxide film formed on a sidewall of the polysilicon film pattern has a thickness substantially identical to that of a portion of the first oxide film formed on a sidewall of the metal silicide film pattern. A failure of a semiconductor device having the gate electrode can be minimized because the gate electrode has an improved sidewall profile.

Abstract: A method for forming a self-aligned contact in a semiconductor device which can reduce process failures and a method for manufacturing a semiconductor device that includes the self-aligned contact are provided. A self-aligned contact hole is formed in an interlayer dielectric film to expose a portion of the substrate between conductive structures formed thereon. A buffer layer is formed on a sidewall of the self-aligned contact hole, on the bottom of the self-aligned contact hole, and on the interlayer dielectric film such that the thickness of the buffer layer at an upper portion of the self-aligned contact hole is greater than the thickness of the buffer layer at the bottom of the self-aligned contact hole. After removing the portion of the buffer layer on the bottom of the self-aligned contact hole, a contact is formed in the self-aligned contact hole to make contact with the substrate.

Abstract: A method for forming a self-aligned contact in a semiconductor device which can reduce process failures and a method for manufacturing a semiconductor device that includes the self-aligned contact are provided. A self-aligned contact hole is formed in an interlayer dielectric film to expose a portion of the substrate between conductive structures formed thereon. A buffer layer is formed on a sidewall of the self-aligned contact hole, on the bottom of the self-aligned contact hole, and on the interlayer dielectric film such that the thickness of the buffer layer at an upper portion of the self-aligned contact hole is greater than the thickness of the buffer layer at the bottom of the self-aligned contact hole. After removing the portion of the buffer layer on the bottom of the self-aligned contact hole, a contact is formed in the self-aligned contact hole to make contact with the substrate.

Abstract: A plasma enhanced chemical vapor deposition apparatus and a method of forming a nitride layer using the same, wherein the plasma enhanced CVD apparatus includes a process chamber including an upper chamber with a dome shape, a lower chamber, and an insulator therebetween, a gas distributing ring, a susceptor for supporting a wafer and heating the process chamber, a plasma compensation ring surrounding the susceptor, a vacuum pump and an electric power source connected to the process chamber. The gas distributing ring has a plurality of upwardly inclined nozzles, allowing upward distribution of reactive gases. The method of forming a nitride layer includes forming a protective film on inner walls of a process chamber, the protective film having at least two layers of differeing dielectric constant, and sequentially supplying reactive gases to the process chamber. A nitride layer formed thereby has low hydrogen content, good density and oxidation resistance.

Abstract: A data communication system and data communication operating method capable of providing a asynchronous data communication service to a public switching telephone network, X.25 network, and Internet by extensively applying a packet assembler deassembler (PAD) function to an interworking function device provided in a code division multiple access (CDMA) type data communication system. If a certain mobile station requests the asynchronous data service, the data communication system analyzes the condition of terminating information inputted by a user of the mobile station, and selectively connects the mobile station to a public switching telephone network, X.25 network, and Internet according to the result of analysis.

Abstract: Methods of forming trench isolation regions include the steps of forming a trench masking layer comprising a first material (e.g., polysilicon) on a semiconductor substrate and then etching a trench in the semiconductor substrate, using the trench masking layer as etching mask. A trench nitride layer comprising a second material different from the first material is then formed on a sidewall of the trench and on a sidewall of the trench masking layer. The trench is then filled with a trench insulating material (e.g., USG). The trench masking layer is then removed by selectively etching the trench masking layer with an etchant that selectively etches the first material at a higher rate than the second material. This step of removing the trench masking layer results in exposure of a protruding portion of the trench nitride layer but does not cause the trench nitride layer to become recessed. The trench insulating material and the trench nitride layer are then etched back to define the trench isolation region.