Patents by Inventor Seung-Ryoul Maeng

Seung-Ryoul Maeng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8874826
    Abstract: Provided are a method and apparatus for programming a buffer cache in a Solid State Disk (SSD) system. The buffer cache programming apparatus in the SSD system may include a buffer cache unit to store pages, a memory unit including a plurality of memory chips, and a control unit to select at least one of the page as a victim page, based on a delay occurring when a page is stored in at least one target memory chip among the plurality of memory chips.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: October 28, 2014
    Assignee: OCZ Storage Solutions, Inc.
    Inventors: Jin-Ho Seol, Seung-Ryoul Maeng, Jin-Soo Kim, Jae-Geuk Kim, Hyo-Taek Shim, Han-Mook Park
  • Publication number: 20120102019
    Abstract: A method and apparatus for crawling webpages are provided. The method and apparatus involve obtaining a root Web address list; obtaining a list of Web addresses linked to the root Web address list; evaluating content of pages of the Web addresses based on the obtained list of Web addresses; adjusting a crawling depth according to the evaluation of the content of the pages of the Web addresses; and crawling webpages according to the adjusted crawling depth.
    Type: Application
    Filed: May 26, 2011
    Publication date: April 26, 2012
    Applicants: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-hyun YOON, Seung-ryoul MAENG, Jae-hyuk HUH, Sang-won SEO, Jae-Hong KIM, Jong-se PARK
  • Publication number: 20110296089
    Abstract: Provided are a method and apparatus for programming a buffer cache in a Solid State Disk (SSD) system. The buffer cache programming apparatus in the SSD system may include a buffer cache unit to store pages, a memory unit including a plurality of memory chips, and a control unit to select at least one of the page as a victim page, based on a delay occurring when a page is stored in at least one target memory chip among the plurality of memory chips.
    Type: Application
    Filed: November 30, 2009
    Publication date: December 1, 2011
    Applicant: INDILINX CO., LTD
    Inventors: Jin-Ho Seol, Seung-Ryoul Maeng, Jin-Soo Kim, Jae-Geuk Kim, Hyo-Taek Shim, Han-Mook Park