Patents by Inventor Seung-Seok HA
Seung-Seok HA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12238941Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.Type: GrantFiled: February 8, 2024Date of Patent: February 25, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seung Seok Ha, Hyun Seung Song, Hyo Jin Kim, Kyoung Mi Park, Guk Il An
-
Patent number: 12199096Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.Type: GrantFiled: February 8, 2024Date of Patent: January 14, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seung Seok Ha, Hyun Seung Song, Hyo Jin Kim, Kyoung Mi Park, Guk Il An
-
Publication number: 20240339540Abstract: A semiconductor device is provided.Type: ApplicationFiled: November 3, 2023Publication date: October 10, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Beom Jin KIM, Guk Hee KIM, Young Woo KIM, Jun Soo KIM, Sang Cheol NA, Kyoung Woo LEE, Anthony Dongick LEE, Min Seung LEE, Myeong Gyoon CHAE, Seung Seok HA
-
Patent number: 12107139Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: GrantFiled: September 18, 2023Date of Patent: October 1, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Guk Il An, Keun Hwi Cho, Dae Won Ha, Seung Seok Ha
-
Publication number: 20240304484Abstract: A stocker system including a stocker apparatus, a transfer robot including a sensing module and a robot arm, a manual port of the stocker apparatus, and a controller in communication with the transfer robot, wherein the controller communicates with the sensing module to determine that a container is transferrable by the robot arm between the manual port of the stocker apparatus and the transfer robot.Type: ApplicationFiled: November 30, 2023Publication date: September 12, 2024Applicant: SEMES CO., LTD.Inventors: Hyeon Uk KIM, Kyoung Soo KIM, Kun Jin RYU, Gyeong Dam BAEK, Seung Hyuk BAEK, Dong Chan SEO, Hu Jong LEE, Jae Hyuk CHA, Ji Won YOON, Sun Oh KIM, Kyeong Jun MIN, Ji Wook KWON, Seung Seok HA, Gil Do KIM
-
Publication number: 20240208085Abstract: Provided are a driving apparatus and an operation method thereof. The driving apparatus includes driving parts driving on a driving path in a clean room in an autonomous driving manner, and handling parts provided on the driving parts and performing a three-dimensional handling operation for an object through flow in multi-directions.Type: ApplicationFiled: September 27, 2023Publication date: June 27, 2024Inventors: Seung Chan LEE, Sun Oh KIM, Jeong Woo HAN, Ho Young LEE, Wang Hyeon SON, Woo Sang KWON, Dong Hoon YANG, Seung Seok HA, Seung Jun LEE, Gil Do KIM, Sang Hoon BAEK, Ji Wook KWON
-
Publication number: 20240186321Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.Type: ApplicationFiled: February 8, 2024Publication date: June 6, 2024Inventors: Seung Seok HA, Hyun Seung SONG, Hyo Jin KIM, Kyoung Mi PARK, Guk Il AN
-
Patent number: 11929367Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.Type: GrantFiled: October 31, 2022Date of Patent: March 12, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seung Seok Ha, Hyun Seung Song, Hyo Jin Kim, Kyoung Mi Park, Guk Il An
-
Publication number: 20240077878Abstract: The inventive concept provides a transfer robot system. Embodiments of the inventive concept provide a transfer robot system and a transfer robot system driving method in which a bottleneck phenomenon of mobile robots may be prevented, as a new obstacle which does not exist within a map for a mobile robot is recognized in advance during an autonomous driving of the mobile robot and the new obstacle is not passed through. The transfer robot system includes an OHT for transferring an article by autonomously driving along a rail and having a bottom side distance detection sensor installed for generating a distance information of below; and a mobile robot for transferring the article by autonomously driving on the ground and autonomously driving while avoiding an obstacle information generated through the distance information.Type: ApplicationFiled: March 3, 2023Publication date: March 7, 2024Applicant: SEMES CO., LTD.Inventors: Seung Jun LEE, Seung Seok HA, In Sung CHOI, Gil Do KIM
-
Publication number: 20240014288Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: ApplicationFiled: September 18, 2023Publication date: January 11, 2024Inventors: Guk Il AN, Keun Hwi CHO, Dae Won HA, Seung Seok HA
-
Patent number: 11799013Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: GrantFiled: June 13, 2022Date of Patent: October 24, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Guk Il An, Keun Hwi Cho, Dae Won Ha, Seung Seok Ha
-
Publication number: 20230195126Abstract: A method of operating a mobile robot for transporting an article in a manufacturing facility, the mobile robot, and an article transport system including the same are proposed. The method of operating the mobile robot includes obtaining a 3-D depth image, extracting, from the 3-D depth image, a region of interest corresponding to a traveling path of the mobile robot on a bottom surface of the manufacturing facility, generating a projected point cloud by projecting an object detected from the region of interest on a reference plane corresponding to the bottom surface, generating an imaginary point cloud filled with voxels in the reference plane, detecting a hole existing in the bottom surface by comparing the imaginary point cloud to the projected point cloud, and travelling while avoiding the hole.Type: ApplicationFiled: December 20, 2022Publication date: June 22, 2023Applicant: SEMES CO., LTD.Inventors: Seung Seok HA, In Sung CHOI, Seung Jun LEE
-
Publication number: 20230053251Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.Type: ApplicationFiled: October 31, 2022Publication date: February 16, 2023Inventors: Seung Seok HA, Hyun Seung SONG, Hyo Jin KIM, Kyoung Mi PARK, Guk Il AN
-
Publication number: 20220352342Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: ApplicationFiled: June 13, 2022Publication date: November 3, 2022Inventors: Guk Il AN, Keun Hwi CHO, Dae Won HA, Seung Seok HA
-
Patent number: 11488953Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.Type: GrantFiled: September 29, 2020Date of Patent: November 1, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seung Seok Ha, Hyun Seung Song, Hyo Jin Kim, Kyoung Mi Park, Guk Il An
-
Patent number: 11387345Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: GrantFiled: February 16, 2021Date of Patent: July 12, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Guk Il An, Keun Hwi Cho, Dae Won Ha, Seung Seok Ha
-
Patent number: 11380791Abstract: A semiconductor device includes a first impurity region, a channel pattern, a second impurity region, a gate structure, a first contact pattern, a second contact pattern and a spacer. The first impurity region may be formed on a substrate. The channel pattern may protrude from an upper surface of the substrate. The second impurity region may be formed on the channel pattern. The gate structure may be formed on a sidewall of the channel pattern and the substrate adjacent to the channel pattern, and the gate structure may include a gate insulation pattern and a gate electrode. The first contact pattern may contact an upper surface of the second impurity region. The second contact pattern may contact a surface of the gate electrode. The spacer may be formed between the first and second contact patterns. The spacer may surround a portion of a sidewall of the second contact pattern, and the spacer may contact a sidewall of each of the first and second contact patterns.Type: GrantFiled: December 19, 2018Date of Patent: July 5, 2022Assignee: SAMSUNG ELECTRONICS CO.. LTD.Inventors: Hyun-Seung Song, Hyo-Jin Kim, Kyoung-Mi Park, Hwi-Chan Jun, Seung-Seok Ha
-
Publication number: 20210167184Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: ApplicationFiled: February 16, 2021Publication date: June 3, 2021Inventors: Guk Il AN, Keun Hwi CHO, Dae Won HA, Seung Seok HA
-
Patent number: 10937887Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.Type: GrantFiled: May 29, 2019Date of Patent: March 2, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Guk Il An, Keun Hwi Cho, Dae Won Ha, Seung Seok Ha
-
Patent number: 10916534Abstract: A semiconductor device includes a first fin pattern and a second fin pattern in a NMOS region, each extending lengthwise along a first direction and separated by a first trench and a third fin pattern and a fourth fin pattern in a PMOS region, each extending lengthwise along the first direction in parallel with respective ones of the first fin pattern and the second fin pattern and separated by a second trench. First and second isolation layers are disposed in the first and second trenches, respectively. A first gate electrode extends lengthwise along a second direction transverse to the first direction and crosses the first fin pattern. A second gate electrode extends lengthwise along the second direction and crosses the second fin pattern. Spaced apart third and fourth gate electrodes extend lengthwise along the second direction on the second isolation layer.Type: GrantFiled: April 26, 2019Date of Patent: February 9, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seung Seok Ha, Kyoung-Mi Park, Hyun-Seung Song, Keon Yong Cheon, Dae Won Ha