Patents by Inventor Seung-Tae HWANG

Seung-Tae HWANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11756850
    Abstract: A chip on film package includes: a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Tae Hwang, Jae-Choon Kim, Kyung-Suk Oh, Woon-Bae Kim, Jae-Min Jung
  • Publication number: 20210398870
    Abstract: A chip on film package includes: a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 23, 2021
    Inventors: Seung-Tae HWANG, Jae-Choon KIM, Kyung-Suk OH, Woon-Bae KIM, Jae-Min JUNG
  • Patent number: 11107743
    Abstract: A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: August 31, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Tae Hwang, Jae-Choon Kim, Kyung-Suk Oh, Woon-Bae Kim, Jae-Min Jung
  • Patent number: 10879225
    Abstract: A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-Keun Kim, Kyung-Suk Oh, Hwa-Il Jin, Dong-Kwan Kim, Yeong-Seok Kim, Jae-Choon Kim, Seung-Tae Hwang
  • Publication number: 20200303276
    Abstract: A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
    Type: Application
    Filed: November 4, 2019
    Publication date: September 24, 2020
    Inventors: Seung-Tae Hwang, Jae-Choon Kim, Kyung-Suk Oh, Woon-Bae Kim, Jae-Min Jung
  • Publication number: 20200135710
    Abstract: A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.
    Type: Application
    Filed: June 4, 2019
    Publication date: April 30, 2020
    Inventors: Won-Keun KIM, Kyung-Suk OH, Hwa-Il JIN, Dong-Kwan KIM, Yeong-Seok KIM, Jae-Choon KIM, Seung-Tae HWANG