Abstract: Provided is a fire cube type of an igniting container, in particular the igniting container which is ignited itself for burning a charcoal contained therein. The fire cube type of an igniting container, includes a receiving volume formed by at least one wall, and made for an inflammable material; a flowing exit formed at an upper part of the receiving volume; a first and second opening formed at opposite parts of the at least one wall; an ignition guiding module forming a plural of flowing tubes to connect the flowing exit, the first and second opening, and displaced within the receiving volume, wherein an ignition is initiated at a position where the plural of flowing tubes intersect.

Abstract: A LoWMob (LoWPAN Mobility: Low power Wireless Personal Area Network) system comprises a mobile node, at least one sensor node, a border node and a gateway. The mobile node configured transmits at least one data packet within an MST (Maximum Sleep Time). The mobile node corresponds to an FFD (Full Function Device) or an RFD (Reduced Function Device). The at least one sensor node is configured to be densely to a degree that a transmission range overlaps and configured to be able to measure a moving direction of the mobile node. The boarder node is configured to be arranged at a periphery of the PAN and configured to turn off a transceiver in a quasi-sleep state. The gateway is directly connected with a first least part of the at least one sensor node.

Abstract: An Internet protocol (IP)-based ubiquitous sensor network (USN) system is disclosed. The IP-based USN includes a plurality of sensor nodes having unique IP addresses and an IP-USN router. The IP-USN router has a table that stores each location address of the sensor nodes and periodically broadcasts its own presence information for updating the location addresses stored in the table. The sensor nodes in the IP-based USN system have unique IP addresses. Therefore, desired information and services from any external network may be obtained.

Abstract: A LoWMob (LoWPAN Mobility: Low power Wireless Personal Area Network) system comprises a mobile node, at least one sensor node, a border node and a gateway. The mobile node configured transmits at least one data packet within an MST (Maximum Sleep Time). The mobile node corresponds to an FFD (Full Function Device) or an RFD (Reduced Function Device). The at least one sensor node is configured to be densely to a degree that a transmission range overlaps and configured to be able to measure a moving direction of the mobile node. The boarder node is configured to be arranged at a periphery of the PAN and configured to turn off a transceiver in a quasi-sleep state. The gateway is directly connected with a first least part of the at least one sensor node.

Abstract: An Internet protocol (IP)-based ubiquitous sensor network (USN) system is disclosed. The IP-based USN includes a plurality of sensor nodes having unique IP addresses and an IP-USN router. The IP-USN router has a table that stores each location address of the sensor nodes and periodically broadcasts its own presence information for updating the location addresses stored in the table. The sensor nodes in the IP-based USN system have unique IP addresses. Therefore, desired information and services from any external network may be obtained.

Abstract: Provided is a routing method for determining a destination in a computer network having multiple interconnected nodes, the method for measuring packet delays among remotely located gateways and processing routing in application layers of the gateways using the packet delays. The routing method based on packet delay includes the steps of setting a re-routing interval and measuring one-way delays among gateways, exchanging the measured delays among the respective gateways and forming delay time tables, calculating an average one-way delay during the re-routing interval, and if a packet is received, applying the calculated average one-way delay to a predetermined algorithm and determining a path from a source gateway to a destination gateway, the path having the minimum delay. Therefore, an improved routing performance can be achieved in real time transmitting a packet by determining the minimum delay path to a destination by measuring packet delays among remotely located nodes in application layers thereof.

Abstract: The present invention relates to a method and system for distinguishing higher layer protocols of the Internet traffic. The method comprises the steps of abstracting basic data from an arrival packet, determining whether or not the abstracted basic data exists in a predetermined administration table, registering a target protocol by selecting the target protocol in corresponding with a higher layer protocol of the arrival packet from a plurality of predetermined target protocols when the abstracted basic data don't exist in the predetermined administration table, renewing the administration table in accordance with the abstracted basic data when the abstracted basic data exists in the predetermined administration table.

Abstract: Provided is a routing method for determining a destination in a computer network having multiple interconnected nodes, the method for measuring packet delays among remotely located gateways and processing routing in application layers of the gateways using the packet delays. The routing method based on packet delay includes the steps of setting a re-routing interval and measuring one-way delays among gateways, exchanging the measured delays among the respective gateways and forming delay time tables, calculating an average one-way delay during the re-routing interval, and if a packet is received, applying the calculated average one-way delay to a predetermined algorithm and determining a path from a source gateway to a destination gateway, the path having the minimum delay. Therefore, an improved routing performance can be achieved in real time transmitting a packet by determining the minimum delay path to a destination by measuring packet delays among remotely located nodes in application layers thereof.

Abstract: A hot-plug controller of PCI (Peripheral Components Interconnects) bus using single chip is disclosed. A PCI hot-plug controller using FPGA and ASIC implements all functions necessary for the PCI hot-plug on a single chip, the PCI hot-plug controller includes: System Interface Unit transmitting data via PCI, USB and I2C bus; Register Unit, which is connected to the System Interface Unit, and receives reset control signal, Present Detection signal, Enable signal, LED control signal and physical ID signal from the outside, and stores the signals; Power Control Unit reading data from the Register Unit and outputting signal to control the system power and slot power; and Bus Isolation Unit reading the control signal from the Register Unit and making the signal-line between PCI bus signal and PCI slot ON/OFF.

Abstract: A SCSI device available for breakdown prediction and self-examination or a breakdown prediction and self-examination method by this device which increases the overall system performance through reducing the loading of a master I2C processor and SCSI bus, by reporting to the master I2C processor only when necessary, after an I2C processor reads the status of the SCSI device.

Abstract: A fault tolerant voltage regulator module (VRM) circuit for a processor simultaneously supplies a core voltage to a plurality of processors, has a plurality of main VRMs (VRM) for supplying the same core voltage to the plurality of processors, a stand-by VRM for use upon a fault occurring in the plurality of main VRMs, a plurality of diodes connected in parallel between each of the main VRMs and the stand-by VRM for automatically supplying power to the stand-by VRM, a plurality of first power islands for connecting each of the plurality of main VRMs to the processor and each of output port of the plurality of diodes, a control signal set switch for setting output voltage level of the stand-by VRM and a second power island for connecting the stand-by VRM to input ports of the plurality of diodes and the control signal set switch.

Abstract: A sound warning circuit for PCI hot plug basically comprises: a timer that takes as inputs a fixed frequency clock and the system port B's bit 0, and which controls the system; a logic AND gate that takes as inputs the timer output and the system port B's bit 1; a speaker driver that takes as an input the AND gate's output; and a speaker that operates based on the speaker driver. In a further embodiment, the timer takes as inputs a fixed frequency clock and either the system port B's bit 0 or a PCI card VDD input, while the AND gate takes as inputs the timer output and any one or more of the system port B's bit 1, a chassis ground cable 0 input, and a chassis ground cable 1 input. In a further embodiment, the AND gate takes as inputs the timer output and either the system port B's bit 1 input or the output of a D Flip-Flop, the latter having the chassis ground cable signal as an input and receiving a reset signal from an AND gate, the latter having as inputs a reset switch input and a system reset # input.