Abstract: Provided is a semiconductor device in which a resistor and a capacitor are inserted in an input/output signal line that connects an input/output pad and an internal circuit at an input/output terminal in order to prevent damage of the internal circuit due to static electricity. The semiconductor device includes the input/output signal line that connects the input/output pad and the internal circuit. A first electrostatic discharge (ESD) protection circuit is branched from the input/output pad and connected to a power supply line, and a second ESD protection circuit is branched from the input/output pad and connected to a ground line. The resistor is located in the input/output signal line, and the capacitor is branched from the power supply line between the power supply line and the resistor.

Abstract: A phase locked loop (PLL) integrated circuit includes a voltage-controlled oscillator (VCO) configured to generate a clock signal at an output terminal thereof. The VCO is further configured to improve the frequency response of the PLL by varying a capacitance of the output terminal concurrently with changing a frequency of the clock signal. The VCO may include a control signal generator, which is configured to generate a plurality of control signals in response to UP and DOWN pumping signals, and an oscillator, which is configured to generate the clock signal in response to the plurality of control signals. The oscillator may be a ring oscillator, which is responsive to the plurality of control signals.

Abstract: A pre-distortion apparatus and method for recovering nonlinear distortion of a high power amplifier. The pre-distortion apparatus includes: a demodulator for demodulating a signal outputted from the high power amplifier, generating a demodulated signal; a first storage unit for storing the demodulated signal outputted from the demodulator; a second storage unit for storing a reference transmission signal outputted from a transmitter of a transmitting system; a digital signal processor for calculating a pre-distortion coefficient by comparing the demodulated signal and the reference transmission signal stored at the first storage unit and the second storage unit; and a third storage unit for storing the pre-distortion coefficient calculated at the digital signal processor.

Abstract: A charge pump circuit may include a plurality of charge pump cells. Each charge pump cell may further include an output node for supplying charge, a pumping node for receiving a clock signal and a pumping capacitor, which may be connected between the output node and the pumping node, for storing the charge and may repeat a charge or discharge operation and/or a pre-charge operation in response to a plurality of clock signals. In the pre-charge operation, a unidirectional charge supply may be performed from a lower voltage output node to a higher voltage output node.

Abstract: A semiconductor power module includes a lead frame having a first portion at a first level, a second portion surrounding the first portion at a second level, and a plurality of terminals connected to the second portion. The semiconductor power module further includes a power circuit mounted on a first surface of the first portion and an insulator having an electrically insulating property and thermal conductivity. The insulator has a first surface adjacent to a second surface of the first portion, and a second surface opposite to the first surface of the insulator and exposed to the outside. The semiconductor power module further includes a sealer having an electrically insulating property that covers the power circuit.

Abstract: A load of a main cell for applying a power to a sensing node of the main cell is equivalent to a load of a reference cell for applying a power to a sensing node of a reference cell. A high voltage higher than a power supply voltage is applied to gate ports of the main cell and the reference cell and is sensed to detect a degraded main cell. Thus, the reliability of a flash memory device is enhanced.

Abstract: Methods and apparatuses for changing capacitance are provided. The apparatus may adjust a current supplied to a load capacitor according to the frequency of an input clock signal. When operating at a lower frequency, a capacitance may be increased such that noise immunity may be increased. When operating at a higher frequency, a capacitance may be decreased such that current consumption may be reduced.

Abstract: A display apparatus with a display part to display a picture thereon, including a user interface (UI) generator to provide an interface screen for setting an overscan region of a picture displayed on the display part; a user input part used for selection/input of a user; and a controller to control the UI generator to display the interface screen for setting the overscan region onto the display part when a user overscan setting function is selected through the user input part. Thus, an optimum overscan region is effectively set through an overscan setting interface screen, thereby displaying an optimum picture.

Abstract: Disclosed is a method for fabricating a semiconductor device by using a PECYCLE-CVD process. The method includes the steps of feeding source gas into a process chamber for predetermined time within one cycle, allowing reaction gas to flow in the process chamber at least until a plasma reaction is finished in the process chamber and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after source gas is reacted, forming plasma in the process chamber for a predetermined time within one cycle so as to allow reaction gas to react with plasma, thereby depositing a thin film on a wafer, and feeding purge gas into the process chamber for a predetermined time within one cycle, thereby purging residual products remaining in the process chamber after reaction gas is reacted. Superior step-coverage and uniformity of the thin film are achieved while depositing the thin film at a higher speed.

Abstract: The conventional decision feedback equalizer has a drawback that can't decide symbols correctly because a simple slicer is used as a symbol detector. A decision feedback equalizer as a symbol detector uses a Trellis Coded Modulation (TCM) decoder whose Trace Back depth is 1 (TBD=1), to thereby decide symbols correctly without decoding delay.

Abstract: A robot control apparatus to control an operation path of a robot includes an interpolator including a rough interpolation processor to output a rough velocity signal of no-acceleration and no-deceleration according to input commands, a plurality of acceleration/deceleration processors to receive the rough velocity signal from the rough interpolation processor and to perform acceleration and deceleration in sequence, and an inverse kinematics processor to transform the velocity signal received from the acceleration/deceleration processor into a joint velocity signal for the robot, and a controller to control the robot according to the accelerated/decelerated velocity signal received from the interpolator. In a robot control apparatus and a control method thereof, precision about an operation path of a robot is improved.

Abstract: A memory device in accordance with embodiments of the present invention includes a reference cell array and a plurality of banks. Each of the banks includes memory cells. A plurality of current copier circuits corresponds to the banks, respectively. Each of the current copier circuits copies a reference current flowing through a reference cell array to generate a reference voltage. A plurality of sense blocks correspond to the banks, respectively. Each of the sense blocks includes a plurality of sense amplifiers for sensing data from a corresponding bank in response to the reference voltage from the corresponding current copier circuit. Memory cell lay-out area is reduced, and sense speed is increased.

Abstract: A robot control apparatus to control an operation path of a robot includes an interpolator including a rough interpolation processor to output a rough velocity signal of no-acceleration and no-deceleration according to input commands, a plurality of acceleration/deceleration processors to receive the rough velocity signal from the rough interpolation processor and to perform acceleration and deceleration in sequence, and an inverse kinematics processor to transform the velocity signal received from the acceleration/deceleration processor into a joint velocity signal for the robot, and a controller to control the robot according to the accelerated/decelerated velocity signal received from the interpolator. In a robot control apparatus and a control method thereof, precision about an operation path of a robot is improved.

Abstract: A method of controlling uplink transmission power to reduce interference in a wireless communication system comprises establishing an uplink communication through an uplink dedicated channel between a user equipment and a base station, wherein the base station is operationally connected to a radio network controller. The method also comprises receiving a scheduling command from the base station for controlling transmission power of the user equipment, wherein the scheduling command is determined from scheduling information comprising transmission power information received from the radio network controller, the transmission power information being determined in response to information associated with at least one user equipment that is in soft handover relationship with another base station. The method also comprises controlling uplink data transmission in response to the scheduling command.

Abstract: At least one implementation of database management technology, described herein, utilizes categorization of query results when querying a relational database in order to reduce information overload. To reduce information overload even further, another implementation, described herein, utilizes both categorization and ranking of query results when searching a relational database.

Abstract: A method of controlling uplink transmission of a user equipment in a soft handover mode in a wireless communication system comprises communicating with a first network and a second network, at a first transmission mode comprising a first transmission power level and a first data rate. The method also comprises receiving a first change command from the second network to change the first transmission mode to a second transmission mode, wherein the second transmission mode comprises a second transmission power level and a second data rate. The method also comprises entering the second transmission mode. The method also comprises maintaining the second transmission mode for a predetermined time period regardless of a second change command from the first network to increase at least one of transmission power level and data rate of the user equipment.

Abstract: Transmitting an acknowledgement/negative acknowledgement (ACK/NACK) signal in association with a packet transmitted on an uplink is disclosed. The method includes the steps of receiving a packet transmitted from a user equipment, decoding the packet, and determining whether the packet has been successfully decoded, transmitting an ACK signal or a NACK signal, based on the decoding result. Different transmission powers are allocated for the ACK signal and the NACK signal. Alternatively, the transmission power for the NACK signal selectively has an OFF level. The present invention optimizes the transmission powers for downlink ACK/NACK signals in accordance with the required reception quality of each of the ACK/NACK signals, and thus, enables the system to operate efficiently.

Abstract: Disclosed is a fluorescent elastic yarn and method for producing the same. The fluorescent elastic yarn which is finished with the spinfinish oil containing the fluorescent agent can fluoresce sufficiently to allow a fine elastic yarn to be seen by the naked eye when ultraviolet light is irradiated to the fluorescent elastic yarn. Therefore, the fluorescent elastic yarn of the present invention is advantageous in that CSY (Core spun yarn) producers are able to identify its presence inside of the hard fiber covering it more easily and timely and thus minimize the numbers of inferior CSY products which are not spun with elastic yarn strands.

Abstract: This invention is related to the calibration apparatus and method for compensating the phase characteristics in the receiving and transmitting signal paths of array antenna system, especially adaptive array antenna system operating as the base station system. The objective of this invention is to provide the calibration apparatus and method for the array antenna system to be able to compensate its phase differences or irregularities without any restrictions on the array structure or position of additional antenna or antenna toplogies while the array antenna system is in its operational mode such that the signals used by the subscribers are received or transmitted together with the signals used for the calibration. In this invention the phase delay between the additional antenna element and each of the antenna elements of the array antenna system is measured in advance of the calibration procedure to be used when the phase differences or irregularities are measured during the calibration procedure.

Abstract: In a channel equalizer applicable to a digital television receiver, a forward filter and a backward filter perform filtering to an input signal and a predetermined signal. A Viterbi decoder corrects errors during a transmission procedure in a blind mode. A training symbol storing block stores training symbols. An output signal of the Viterbi decoder and symbols are provided to the backward filter in accordance with a blind mode or a training mode. A Kalman gain is calculated in a Kalman gain calculating block and an error signal is calculated by comparing an equalized signal, symbols, and the output signal of the Viterbi decoder with one another. A tap coefficient is updated by using the calculated error signal and the Kalman gain.