Patents by Inventor Seung Yeop KOOK

Seung Yeop KOOK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180342452
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Application
    Filed: July 18, 2018
    Publication date: November 29, 2018
    Inventors: Sun Ho KIM, Ji Hoon KIM, Ha Young AHN, Shang Hoon SEO, Seung Yeop KOOK, Sung Won JEONG
  • Patent number: 10128179
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sun Ho Kim, Ji Hoon Kim, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook, Sung Won Jeong
  • Patent number: 10115648
    Abstract: A fan-out semiconductor package and an electronic device including the same are provided. The fan-out semiconductor package includes a semiconductor chip; an interconnection member electrically connected to the semiconductor chip and having a connection terminal pad; and a passivation layer disposed at one side of the interconnection member and having an opening part opening a portion of the connection terminal pad. Distances from a center of the connection terminal pad to at least two points of an edge thereof are different from each other.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: October 30, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Shang Hoon Seo, Seung Yeop Kook, Ha Young Ahn, Sung Won Jeong, Young Gwan Ko
  • Patent number: 10062652
    Abstract: The present disclosure relates to a fan-out semiconductor package including a frame having a through hole, a semiconductor chip disposed in the through hole, a first encapsulant disposed in a space between the frame and the semiconductor chip, a second encapsulant disposed on one sides of the frame and the semiconductor chip, and a redistribution layer disposed on the other sides of the frame and the semiconductor chip, and a method of manufacturing the same. The first encapsulant and the second encapsulant may include different materials.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: August 28, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ji Hyun Lee, Kyoung Moo Harr, Seung Yeop Kook, Ji Hoon Kim, Young Gwan Ko
  • Publication number: 20180197827
    Abstract: The present disclosure relates to a fan-out semiconductor package including a frame having a through hole, a semiconductor chip disposed in the through hole, a first encapsulant disposed in a space between the frame and the semiconductor chip, a second encapsulant disposed on one sides of the frame and the semiconductor chip, and a redistribution layer disposed on the other sides of the frame and the semiconductor chip, and a method of manufacturing the same. The first encapsulant and the second encapsulant may include different materials.
    Type: Application
    Filed: March 6, 2018
    Publication date: July 12, 2018
    Inventors: Ji Hyun LEE, Kyoung Moo HARR, Seung Yeop KOOK, Ji Hoon KIM, Young Gwan KO
  • Patent number: 9929117
    Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: March 27, 2018
    Assignee: SAMSUNG ELECTRO-MACHANICS CO., LTD.
    Inventors: Ji Hyun Lee, Sung Won Jeong, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook
  • Patent number: 9859243
    Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: January 2, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ji Hyun Lee, Sung Won Jeong, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook
  • Publication number: 20170358548
    Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.
    Type: Application
    Filed: August 7, 2017
    Publication date: December 14, 2017
    Inventors: Ji Hyun LEE, Sung Won JEONG, Ha Young AHN, Shang Hoon SEO, Seung Yeop KOOK
  • Patent number: 9839126
    Abstract: There are provided a printed circuit board including: an insulation layer in which a via hole is formed; vias formed in the via hole; first circuit patterns formed below the insulation layer and electrically connected to the vias; and second circuit patterns formed on the insulation layer to be bonded to the vias; wherein the via has a diameter smaller than that of the via hole, and a method of manufacturing a printed circuit board.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: December 5, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung Sam Kang, Young Kwan Lee, Seung Eun Lee, Seung Yeop Kook
  • Patent number: 9831203
    Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: November 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ji Hyun Lee, Sung Won Jeong, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook
  • Patent number: 9832885
    Abstract: Disclosed is a circuit board having a contact pad for connection with an external device, which protrudes from an upper surface of an outermost insulating layer. A device can be mounted on the circuit board, and a connection terminal of the device can be connected to the contact pad of the circuit board by a wire etc.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: November 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung Sam Kang, Ki Jung Sung, Seung Yeop Kook, Seung Eun Lee
  • Publication number: 20170294469
    Abstract: A substrate for a camera module includes: a first substrate; an image sensor installed on the first substrate and a memory chip installed to be embedded in the first substrate. The first substrate includes a soft substrate portion disposed at a central portion of the first substrate, and a hard substrate portion formed on upper and lower portions of the soft substrate portion, and at least a portion of the memory chip is disposed in an installation hole formed in the soft substrate portion.
    Type: Application
    Filed: December 6, 2016
    Publication date: October 12, 2017
    Inventors: Seung Eun LEE, Jin Seon PARK, Yul Kyo CHUNG, Chul CHOI, Dae Young JUNG, Seung Yeop KOOK
  • Publication number: 20170271272
    Abstract: The present disclosure relates to a fan-out semiconductor package including a frame having a through hole, a semiconductor chip disposed in the through hole, a first encapsulant disposed in a space between the frame and the semiconductor chip, a second encapsulant disposed on one sides of the frame and the semiconductor chip, and a redistribution layer disposed on the other sides of the frame and the semiconductor chip, and a method of manufacturing the same. The first encapsulant and the second encapsulant may include different materials.
    Type: Application
    Filed: November 15, 2016
    Publication date: September 21, 2017
    Inventors: Ji Hyun LEE, Kyoung Moo HARR, Seung Yeop KOOK, Ji Hoon KIM, Young Gwan KO
  • Publication number: 20170202083
    Abstract: A printed circuit board includes: a core member including a through-hole; a sub-circuit board disposed in the through-hole; a first insulating layer disposed on opposing surfaces of the core member and opposing surfaces of the sub-circuit board; and an insulating material disposed between an inner wall of the through-hole and the sub-circuit board.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 13, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong-Ho BAEK, Jung-Hyun CHO, Seung-Yeop KOOK
  • Publication number: 20170178992
    Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a component disposition region defined by an inner wall of the frame surrounding the electronic component, and an encapsulant filling at least a portion of the component disposition region. A portion of the inner wall of the frame forms a protrusion protruding toward the electronic component.
    Type: Application
    Filed: July 8, 2016
    Publication date: June 22, 2017
    Inventors: Sung Won JEONG, Ji Hoon KIM, Sun Ho KIM, Shang Hoon SEO, Seung Yeop KOOK, Christian ROMERO
  • Publication number: 20170148699
    Abstract: A fan-out semiconductor package and an electronic device including the same are provided. The fan-out semiconductor package includes a semiconductor chip; an interconnection member electrically connected to the semiconductor chip and having a connection terminal pad; and a passivation layer disposed at one side of the interconnection member and having an opening part opening a portion of the connection terminal pad. Distances from a center of the connection terminal pad to at least two points of an edge thereof are different from each other.
    Type: Application
    Filed: November 3, 2016
    Publication date: May 25, 2017
    Inventors: Shang Hoon SEO, Seung Yeop KOOK, Ha Young AHN, Sung Won JEONG, Young Gwan KO
  • Publication number: 20170141063
    Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.
    Type: Application
    Filed: June 15, 2016
    Publication date: May 18, 2017
    Inventors: Ji Hyun LEE, Sung Won JEONG, Ha Young AHN, Shang Hoon SEO, Seung Yeop KOOK
  • Publication number: 20170133309
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Application
    Filed: October 27, 2016
    Publication date: May 11, 2017
    Inventors: Sun Ho KIM, Ji Hoon KIM, Ha Young AHN, Shang Hoon SEO, Seung Yeop KOOK, Sung Won JEONG
  • Publication number: 20160302308
    Abstract: There are provided a printed circuit board, an electronic component module and a method of manufacturing the same. The printed circuit board includes a circuit board including a through hole and a first circuit pattern, and a connection board having a microcircuit structure including a second circuit pattern, the connection board accommodated in the through hole.
    Type: Application
    Filed: September 30, 2015
    Publication date: October 13, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jeong Ho LEE, Young Do KWEON, Hyoung Joon KIM, Seung Yeop KOOK
  • Patent number: 9420709
    Abstract: Disclosed herein are a coreless board for a semiconductor package and a method of manufacturing the same. The coreless board for the semiconductor package includes: a support; a build-up layer formed on the support; an external connection terminal formed on the build-up layer; and a solder resist layer formed on the build-up layer so as to expose the external connection terminal.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: August 16, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Kwan Lee, Myung Sam Kang, Joo Hwan Jung, Ju Hee Park, Seung Yeop Kook