Abstract: A control device and a substrate processing apparatus including the same are provided. The substrate processing apparatus includes: a support unit including a spin head and configured to support and to rotate a substrate; a spraying unit configured to spray processing liquid onto the substrate; a correction unit in a swing arm, the correction unit configured to move to a target point on the substrate and to irradiate a beam when the processing liquid is sprayed onto the substrate; and a control unit configured to calculate the target point, wherein the control unit is configured to convert image coordinates associated with a first coordinate system and then to calculate the target point by converting the image coordinates associated with the first coordinate system into image coordinates associated with a second coordinate system, and the second coordinate system is based on rotation angles of the spin head and the swing arm.

Abstract: Disclosed are methods and apparatuses for transmitting and receiving data channels in a communication system. An operation method of a terminal in a communication system may comprise receiving, from a base station, resource allocation information of a plurality of physical uplink shared channels (PUSCHs) used for repetitive transmission of a same transport block (TB); identifying a position of each of the plurality of PUSCHs in a time domain based on the resource allocation information; and repeatedly transmitting the same TB to the base station at the position of each of the plurality of PUSCHs. Therefore, performance of the communication system can be improved.

Abstract: Disclosed are a method and an apparatus for uplink transmission in a communication system. An operation method of a terminal includes: receiving, from a base station, first SFI information indicating n flexible symbol(s); receiving, from the base station, second SFI information re-indicating m symbol(s) of the n flexible symbol(s) as uplink (UL) symbol(s); and transmitting an SRS to the base station through the m symbol(s) re-indicated as a UL symbol among the n flexible symbol(s) indicated as a flexible symbol. Therefore, performance of the communication system can be improved.

Abstract: The present invention relates to a hydroxylphenyl-terminated polysiloxane, a polysiloxane-polycarbonate copolymer comprising the same as repeating unit, and a method for preparing the copolymer, and more specifically, a polysiloxane of a specific structure having terminal silane unit comprising optionally substituted hydroxylphenyl group, and a polysiloxane-polycarbonate copolymer which comprises the polysiloxane and a polycarbonate block as repeating units, and thereby shows the same or more excellent transparency and significantly further improved flame retardancy as compared with the level of conventional polysiloxane-polycarbonate copolymer, and a method for preparing the same.

Abstract: Disclosed are various methods for transmitting or receiving data or control information having high reliability conditions. A method for operating a terminal which transmits uplink control information (UCI) includes: a step of generating UCI; a step of comparing the priority of an uplink (UL) control channel for the transmission of the UCI with the priority of a UL data channel when some symbols of the UL control channel and the UL data channel overlap; and a step of selecting the UL channel having a higher priority among the UL control channel and the UL data channel, and transmitting the UCI to a base station through the selected UL channel.

Abstract: A battery pack includes a battery assembly including a plurality of cell units, and a pack case that houses the battery assembly in an inner space, wherein each cell unit includes at least one battery cell and a cell cover that partially covers the at least one battery cell, and wherein the cell cover comprises a first cover part that covers one side surface of the at least one battery cell, a second cover part that covers the other side surface of the at least one battery cell, a third cover part that connects one end of the first cover part and one end of the second cover part, and blocking parts that are respectively formed at the other end of the first cover part and the other end of the second cover part, and block removal of the at least one battery cell.

Abstract: A semiconductor memory device includes a cell unit including a stack structure and a channel structure penetrating through the stack structure, the stack structure including at least one string selection gate and a plurality of cell gates, cell separation structures separating the cell unit in a first direction, and gate cutting structures defining regions within the cell unit between adjacent cell separation structures. The cell unit includes a first region defined between a first cell separation structure and a first gate cutting structure and a second region defined between the first gate cutting structure and a second gate cutting structure. A ratio of a region of the at least one string selection gate that is occupied by a conductive material in the second region is greater than a ratio of a region of at least one cell gate that is occupied by the conductive material in the second region.

Abstract: The present disclosure relates to an image encoding/decoding method for a machine and a device therefor. An image encoding method according to the present disclosure includes extracting an encoding method feature from an encoding input signal; determining an encoding method that is optimal for the encoding input signal based on the encoding method feature; transforming the encoding input signal based on the encoding method; and encoding an encoding target signal generated by transforming encoding method information and the encoding input signal.

Abstract: Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a first gate stack structure including a first dielectric pattern and a first conductive pattern that are alternately stacked with each other, a memory channel structure including a first memory portion that penetrates the first gate stack structure, a through contact including a first through portion at a level the same as a level of the first memory portion, and a connection contact including a first connection portion at a level the same as the level of the first memory portion and the level of the first through portion. A minimum width of the first memory portion is less than a minimum width of the first through portion and a minimum width of the first connection portion.

Abstract: A three-dimensional semiconductor device includes: a source structure including a cell region and an extension region; a gate stacking structure disposed on the source structure, the gate stacking structure including insulating patterns and conductive patterns, which are alternately stacked on each other; an insulating structure disposed on the gate stacking structure, the insulating structure including a plurality of insulating layers; a memory channel structure penetrating the gate stacking structure and electrically connected to the cell region; a separation structure penetrating the gate stacking structure and extending from the cell region to the extension region; and a penetration plug penetrating the gate stacking structure and the extension region, wherein the penetration plug includes: a first plug portion penetrating the gate stacking structure; and a second plug portion on the first plug portion, wherein the separation structure includes: a first separation portion penetrating the gate stacking str

Abstract: A three-dimensional semiconductor memory device includes: a stack structure including a ground selection line, first word lines, second word lines, and a string selection line, which are sequentially stacked on a substrate; vertical channel structures penetrating the stack structure and arranged to form a plurality of columns; a lower separation structure crossing a lower portion of the stack structure in a first direction and dividing the ground selection line along a second direction intersecting the first direction; and first and second upper separation structures crossing an upper portion of the stack structure in the first direction and dividing the string selection line along the second direction, wherein the lower separation structure and the first upper separation structure are vertically overlapped with one of the columns of the vertical channel structures, and the second upper separation structures are provided between the vertical channel structures.

Abstract: A three-dimensional semiconductor memory device includes a substrate, and a stack structure on the substrate. The stack structure includes first blocks that extend in a first direction and are arranged in a second direction intersecting the first direction, and a second block that is between the first blocks; separation structures that extend in the first direction and are arranged in the second direction between the first blocks and between the first and second blocks; vertical channel structures that penetrate the first blocks and contact the substrate; and through-via structures that penetrate the second block and the substrate. A width of each of the first blocks in the second direction is equal to a width of the second block in the second direction.

Abstract: A semiconductor memory device includes a cell unit including a stack structure and a channel structure penetrating through the stack structure, the stack structure including at least one string selection gate and a plurality of cell gates, cell separation structures separating the cell unit in a first direction, and gate cutting structures defining regions within the cell unit between adjacent cell separation structures. The cell unit includes a first region defined between a first cell separation structure and a first gate cutting structure and a second region defined between the first gate cutting structure and a second gate cutting structure. A ratio of a region of the at least one string selection gate that is occupied by a conductive material in the second region is greater than a ratio of a region of at least one cell gate that is occupied by the conductive material in the second region.

Abstract: A semiconductor device includes an active region that extends in a first direction and has a first width in a second direction that intersects the first direction, a first gate structure disposed on the active region that has a second width in the first direction and extends in the second direction, a first metal contact spaced apart from the first gate structure in the first direction, a first trench formed in the active region, and an insulating material that fills the first trench and forms a first active cut, wherein the first active cut defines a first metal region in the active region in which the first metal contact is located, and the first metal contact is placed off-center inside the first metal region and a length of a region where the first gate structure and the active region overlap is greater than that of the first and second trenches.