Abstract: A stereo and dual audio signal identifying system comprising, an FM detector, bandpass filter, and AM detector which generate a filter/detected input to a first PLL having a 210 Hz reference signal. The first PLL generates a first input to a comparator and a second PLL generates a second input to the comparator. The comparator generates an output signal indicative of the presence of stereo and dual audio signals.

Abstract: A high band weighting circuit of a noise reduction circuit is disclosed. For elevating a mid and high frequency component gain comparing with a low frequency component among input signal, the high band weighting circuit comprises a capacitor a dividing means a first voltage-to-current converting circuit, a second voltage-to-current converting circuit, a first current mirror circuit outputting a third current signal corresponding to a first current signal of the first voltage-to-current converting circuit, a second current mirror circuit coupling a fourth current signal to the output terminal corresponding to a second current signal of the second voltage-to-current converting circuit, and a third current mirror circuit coupling a fifth current signal to the output terminal corresponding to a third current signal of the first current mirror circuit.

Abstract: In a noise reduction circuit with a main signal path and an auxiliary signal path having a high-pass filter characteristic, the noise reduction circuit comprises: a voltage-to-current converting circuit having a differential input and output and connecting the auxiliary signal path to the main signal path, PN junction transistors connected to the differential output of the voltage-to-current converting circuit, a paired common-emitter transistor arrangement having one base electrode connected to the PN junction transistors, a capacitance connected to a first differential input of the voltage-to-current converting circuit, a feedback resistor connecting a collector of a first common-emitter transistor pair of the paired common-emitter transistor arrangement to the first differential input of the voltage-to-current converting circuit, a voltage buffer having the collector of the first common-emitter transistor pair of the paired common-emitter transistor arrangement and a voltage dividing resistance connected t

Abstract: A noise reduction circuit includes a main signal path and an auxiliary signal path having a high-pass filter characteristic. The noise reduction circuit may be used as a compression circuit or an expansion circuit in conjunction with a transmitter or a receiver, respectively. The auxiliary signal path includes a voltage dividing circuit, a voltage-to-current coverting circuit; a differential amplifier, and a voltage buffer connected between an input terminal and an operational amplifier. The main signal path is constituted by a resistance connected between the input terminal and the operational amplifier. The noise reduction circuit improves precision by eliminating the influence of absolute value variation of resistance which can occur in integrated circuit fabrication.