Patents by Inventor SEUNG-CHAN YUN

SEUNG-CHAN YUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10937700
    Abstract: A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor pattern, second semiconductor patterns doped with second impurities contacting upper edge surfaces, respectively, of the first channel pattern, and a first gate structure surrounding at least a portion of a sidewall of the first channel pattern.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: March 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mirco Cantoro, Yun-Il Lee, Hyung-Suk Lee, Yeon-Cheol Heo, Byoung-Gi Kim, Chang-Min Yoe, Seung-Chan Yun, Dong-Hun Lee
  • Patent number: 10276564
    Abstract: A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: April 30, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mirco Cantoro, Yeon Cheol Heo, Byoung Gi Kim, Chang Min Yoe, Seung Chan Yun, Dong Hun Lee, Yun Il Lee, Hyung Suk Lee
  • Publication number: 20180151561
    Abstract: A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.
    Type: Application
    Filed: April 17, 2017
    Publication date: May 31, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Mirco CANTORO, Yeon Cheol HEO, Byoung Gi KIM, Chang Min YOE, Seung Chan YUN, Dong Hun LEE, Yun Il LEE, Hyung Suk LEE
  • Publication number: 20180130713
    Abstract: A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor pattern, second semiconductor patterns doped with second impurities contacting upper edge surfaces, respectively, of the first channel pattern, and a first gate structure surrounding at least a portion of a sidewall of the first channel pattern.
    Type: Application
    Filed: May 1, 2017
    Publication date: May 10, 2018
    Inventors: MIRCO CANTORO, YUN-IL LEE, HYUNG-SUK LEE, YEON-CHEOL HEO, BYOUNG-GI KIM, CHANG-MIN YOE, SEUNG-CHAN YUN, DONG-HUN LEE