Patents by Inventor SEUNGHAN SIM

SEUNGHAN SIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250210565
    Abstract: A method of manufacturing a semiconductor package includes forming an insulating layer; forming a seed layer on the insulating layer; forming a photoresist layer on the seed layer; forming a plurality of line pattern holes by patterning the photoresist layer, a horizontal length of a middle portion of each of the plurality of line pattern holes being less than a horizontal length of an upper portion of each of the plurality of line pattern holes and a horizontal length of a lower portion of each of the plurality of line pattern holes; and forming a redistribution line pattern by performing a plating process using a portion of the seed layer exposed by the plurality of line pattern holes.
    Type: Application
    Filed: March 11, 2025
    Publication date: June 26, 2025
    Inventors: Eunsil Kim, Seunghan Sim, Gun Lee
  • Patent number: 12272666
    Abstract: A method of manufacturing a semiconductor package includes forming an insulating layer; forming a seed layer on the insulating layer; forming a photoresist layer on the seed layer; forming a plurality of line pattern holes by patterning the photoresist layer, a horizontal length of a middle portion of each of the plurality of line pattern holes being less than a horizontal length of an upper portion of each of the plurality of line pattern holes and a horizontal length of a lower portion of each of the plurality of line pattern holes; and forming a redistribution line pattern by performing a plating process using a portion of the seed layer exposed by the plurality of line pattern holes.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 8, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eunsil Kim, Seunghan Sim, Gun Lee
  • Publication number: 20230045383
    Abstract: A method of manufacturing a semiconductor package includes forming an insulating layer; forming a seed layer on the insulating layer; forming a photoresist layer on the seed layer; forming a plurality of line pattern holes by patterning the photoresist layer, a horizontal length of a middle portion of each of the plurality of line pattern holes being less than a horizontal length of an upper portion of each of the plurality of line pattern holes and a horizontal length of a lower portion of each of the plurality of line pattern holes; and forming a redistribution line pattern by performing a plating process using a portion of the seed layer exposed by the plurality of line pattern holes.
    Type: Application
    Filed: May 16, 2022
    Publication date: February 9, 2023
    Inventors: EUNSIL KIM, SEUNGHAN SIM, GUN LEE