Patents by Inventor Sevim Korkmaz

Sevim Korkmaz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12193208
    Abstract: A DRAM capacitor may include a first capacitor electrode, a capacitor dielectric adjacent to the first capacitor electrode, and a second capacitor electrode adjacent to the capacitor dielectric. The first capacitor electrode may include a lower portion, an upper portion, and a step transition between the lower portion and the upper portion, a width of the upper portion of the first capacitor electrode at the step transition is less than a width of the lower portion of the first capacitor electrode at the step transition. Semiconductor devices, systems, and methods are also disclosed.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: January 7, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Devesh Dadhich Shreeram, Kangle Li, Matthew N. Rocklein, Wei Ching Huang, Ping-Cheng Hsu, Sevim Korkmaz, Sanjeev Sapra, An-Jen B. Cheng
  • Publication number: 20240088211
    Abstract: Methods, apparatuses, and systems related to an over-sculpted storage node are described. An example method includes forming an opening in a pattern of materials. The method further includes performing an etch to over-sculpt the opening. The method further includes depositing a storage node material in the over-sculpted opening to form an over-sculpted storage node. The method further includes performing an etch to remove portions of the pattern of materials. The method further includes performing an etch on the storage node material to trim the over-sculpted storage node.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Devesh Dadhich Shreeram, Sanjeev Sapra, Kangle Li, Sevim Korkmaz
  • Publication number: 20220238532
    Abstract: A DRAM capacitor may include a first capacitor electrode, a capacitor dielectric adjacent to the first capacitor electrode, and a second capacitor electrode adjacent to the capacitor dielectric. The first capacitor electrode may include a lower portion, an upper portion, and a step transition between the lower portion and the upper portion, a width of the upper portion of the first capacitor electrode at the step transition is less than a width of the lower portion of the first capacitor electrode at the step transition. Semiconductor devices, systems, and methods are also disclosed.
    Type: Application
    Filed: January 13, 2022
    Publication date: July 28, 2022
    Inventors: Devesh Dadhich Shreeram, Kangle Li, Matthew N. Rocklein, Wei Ching Huang, Ping-Cheng Hsu, Sevim Korkmaz, Sanjeev Sapra, An-Jen B. Cheng
  • Patent number: 11127588
    Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: September 21, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Sevim Korkmaz, Sanjeev Sapra, Jerome A. Imonigie, Armin Saeedi Vahdat
  • Patent number: 11011521
    Abstract: Methods, apparatuses, and systems related to removing a hard mask are described. An example method includes patterning a silicon hard mask on a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes an opening through the semiconductor structure using the patterned hard mask to form a pillar support. The method further includes forming a silicon liner material on the semiconductor structure. The method further includes removing the silicon liner material using a wet etch process.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: May 18, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Sevim Korkmaz, Devesh Dadhich Shreeram, Srinivasan Balakrishnan, Dewali Ray, Sanjeev Sapra, Paul A. Paduano
  • Patent number: 10985239
    Abstract: Methods, apparatuses, and systems related to trim a semiconductor structure using oxygen are described. An example method includes forming a support structure for a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming an opening through the semiconductor structure. The method further includes depositing an electrode material within the opening. The method further includes removing portions of the support structure. The method further includes performing a controlled oxidative trim to an upper portion of the electrode material.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 20, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Matthew N. Rocklein, An-Jen B. Cheng, Fredrick D. Fishburn, Sevim Korkmaz, Paul A. Paduano
  • Patent number: 10964475
    Abstract: Methods, apparatuses, and systems related to forming a capacitor using a sacrificial material are described. An example method includes forming a first silicate material on a substrate. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming a sacrificial material on the second nitride material. The method further includes forming a column of capacitor material through the first silicate material, the first nitride material, the second silicate material, the second nitride material, and the sacrificial material. The method further includes removing the sacrificial material to expose a top portion of the capacitor material.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: March 30, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Devesh Dadhich Shreeram, Sevim Korkmaz, Jian Li, Sanjeev Sapra, Dewali Ray
  • Publication number: 20210050409
    Abstract: Methods, apparatuses, and systems related to trim a semiconductor structure using oxygen are described. An example method includes forming a support structure for a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming an opening through the semiconductor structure. The method further includes depositing an electrode material within the opening. The method further includes removing portions of the support structure. The method further includes performing a controlled oxidative trim to an upper portion of the electrode material.
    Type: Application
    Filed: August 16, 2019
    Publication date: February 18, 2021
    Inventors: Matthew N. Rocklein, An-Jen B. Cheng, Fredrick D. Fishburn, Sevim Korkmaz, Paul A. Paduano
  • Publication number: 20200381437
    Abstract: Methods, apparatuses, and systems related to removing a hard mask are described. An example method includes patterning a silicon hard mask on a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes an opening through the semiconductor structure using the patterned hard mask to form a pillar support. The method further includes forming a silicon liner material on the semiconductor structure. The method further includes removing the silicon liner material using a wet etch process.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 3, 2020
    Inventors: Sevim Korkmaz, Devesh Dadhich Shreeram, Srinivasan Balakrishnan, Dewali Ray, Sanjeev Sapra, Paul A. Paduano
  • Publication number: 20200328076
    Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.
    Type: Application
    Filed: April 12, 2019
    Publication date: October 15, 2020
    Inventors: Sevim Korkmaz, Sanjeev Sapra, Jerome A. Imonigie, Armin Saeedi Vahdat
  • Publication number: 20200243258
    Abstract: Methods, apparatuses, and systems related to forming a capacitor using a sacrificial material are described. An example method includes forming a first silicate material on a substrate. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming a sacrificial material on the second nitride material. The method further includes forming a column of capacitor material through the first silicate material, the first nitride material, the second silicate material, the second nitride material, and the sacrificial material. The method further includes removing the sacrificial material to expose a top portion of the capacitor material.
    Type: Application
    Filed: January 28, 2019
    Publication date: July 30, 2020
    Inventors: Devesh Dadhich Shreeram, Sevim Korkmaz, Jian Li, Sanjeev Sapra, Dewali Ray