Abstract: Method and structure for temperature stabilization in semiconductor devices are disclosed. In one embodiment, a carbon-based polymer is deposited on top of an interconnect metal line in the semiconductor die where relatively large power dissipation is known to occur. Reduction of the range of temperature excursions in the semiconductor die is achieved since the polymer acts as a cushion to dampen the range of temperature excursions of the semiconductor die. During occurrence of power pulses in the semiconductor die, the polymer absorbs energy from the interconnect metal, and thus from the semiconductor devices that are connected to the interconnect metal, by expanding without a rise in the temperature of the polymer. The energy generated when power pulses are being dissipated in the semiconductor die does not result in a substantial rise in the temperature of the polymer.

Abstract: A plurality of digital modules on a Futurebus Plus common system bus means in a network are connected by the Futurebus Plus system bus for transfer of data between modules. A sending module (master) transmits address and message data on the bus to a receiving module (slave). Each module provides an interface having a Longitudinal Redundancy Checker such that the sending module transmits a first check word to the receiving module which generates a second check-word. If these check words match, then the data is accepted as good. Thus, the network can work continuously using the system bus even while new digital modules are inserted onto the system bus or detached from the system bus.

Abstract: In a multiprocessor system, at least one processor is acting as a master processor and another processor is acting as the slave or shadow processor that checks operation of the first processor. Periodically, a controller switches operating mode of a master or main processor to slave or shadow mode, and at the same time switches operation of a slave or shadow processor to main or master processing mode. The first processor is then used as a slave or shadow processor to check operation of the second processor.

Abstract: A multiported buffer memory system provides access to four external sources which can access data words in any one of four memory modules. The functions of Reading and Writing and status information can occur simultaneously during the course of system cycles so that any one external source can access any one of the multiple memory modules for Reading and Writing operations. Likewise the concept can be expanded to M input/output ports working together with M memory modules without loss of speed and data communication transfer capabilities.

Abstract: A device interface module provides multiple concurrently operating data transfer channels between multiple groups of peripheral devices and ad multiported buffer memory which communicates via an interface bus to other external modules of a computer system.

Abstract: In a data processing system, a command sending module sends a command over a bus to two command executing modules at the same time, and that command is to be performed by either one, but not both, of the command executing modules.

Abstract: A process for manufacturing a pin grid array package providing a plurality of electrical input and/or output connections using a plurality of stacked, but spaced apart, separate leadframes which are preformed and include a plurality of electrical leads having first and second ends for providing a plurality of different connections. An insulating layer is positioned between adjacent leadframes and the package is bonded together.

Abstract: A mass storage/retrieval module for controlling the storage and retrieval operations of massive amounts of data in peripheral devices such as tape, disk, optical, etc. provides for a buffer memory system in each of the interface control modules which permit simultaneous and concurrent writing to buffer storage and reading out of buffer storage through multiple ports for high rates of data transfer operations. Redundancy and high reliability is provided in that each module of the system has dual busses and live replacement units such that, upon failure, an alternate unit can carry the circuitry requirements until the failing unit has been replaced.

Abstract: A three dimensional integrated circuit interconnect for connecting a plurality of chips in a module with a standard footprint for pin grid array or quad flat pack mounting. Each IC is mounted on a custom interconnect slice and tested. The slices are stacked together with electrical connections from one slice layer to the next. The module may use multi-layer ceramic slices or printed circuit board materials.

Abstract: A process for making thermosetting or thermoplastic encapsulated integrated circuit having a heat exchanger in which one end of the heat exchanger is encapsulated in the housing adjacent to the integrated circuit and the other end is exposed to the environment beyond the housing portion. The process of making includes molding a heat exchanger into a thermosetting or thermoplastic package utilizing a preformed heat exchanger having a dissolvable or removable material which serves as a seal block during the molding operation. A plurality of thermally conductive heat exchanger elements are provided for providing the desired thermal performance while reducing the thermal stresses in the package.

Abstract: A mass storage/retrieval module for controlling the storage and retrieval operations of massive amounts of data in peripheral devices such as tape, disk, optical, etc. provides for a buffer memory system in each of the interface control modules which permit simultaneous and concurrent writing to buffer storage and reading out of buffer storage through multiple ports for high rates of data transfer operations. Redundancy and high reliability is provided in that each module of the system has dual busses and live replacement units such that, upon failure, an alternate unit can carry the circuitry requirements until the failing unit has been replaced.

Abstract: An encapsulated integrated circuit package having an integrated circuit chip with a plurality of electrical leads connected thereto and at least one thermally conductive screen mesh positioned adjacent to the chip. A non-electrically conductive thermosetting or thermoplastic material forms a housing enclosing the chip and bonded to the screen mesh. Preferably one of the layers is exposed to the outside of the housing and the screen mesh is secured to a substrate supporting the chip.

Abstract: An integrated circuit structure and method of making in which the circuit has a plurality of metal heat exchanger elements spaced from each other with their first ends secured to the structure. The first ends may be adhesively secured to an integrated circuit chip or the underlying substrate, and the heat exchanger may be hermetically attached. The method uses a compliant removable support block for attaching the plurality of individual heat exchanger elements to integrated circuit structures having variations in their elevation.

Abstract: A capacitor, having an area smaller than the top area of a chip, is attached above the top of a tape-automated-bonded (TAB) chip and short bonded wires or TAB leads interconnect the capacitor electrodes with the power and ground pads on the chip. The interconnections are made as short as possible, with a maximum distance therebetween and with the greatest number which will reduce the inductance of the leads. The power and ground pads may contain inwardly extending bonding regions for wire bonds or flip chip capacitor attachment.