Patents by Inventor Seyed Hajimiri

Seyed Hajimiri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097498
    Abstract: A roaming and articulating wireless power delivery device includes, in part, an optical assembly adapted to deliver an optical beam, an energy storage unit, a controller, and an electrically driven moving platform. The moving platform may include an inertia measurement, a GPS, bump sensors and proximity sensors. The device may further include a camera, a gradient filter, and a wireless communication link via which the device establishes a two-way communication with a recovery unit being wirelessly powered.
    Type: Application
    Filed: December 21, 2020
    Publication date: March 21, 2024
    Inventors: Behrooz Abiri, Seyed A. Hajimiri, Florian Bohn, Artsroun Darbinian, Dan Sturm, Farhud Tebbi
  • Publication number: 20210234408
    Abstract: A roaming and articulating wireless power delivery device includes, in part, an optical assembly adapted to deliver an optical beam, an energy storage unit, a controller, and an electrically driven moving platform. The moving platform may include an inertia measurement, a GPS, bump sensors and proximity sensors. The device may further include a camera, a gradient filter, and a wireless communication link via which the device establishes a two-way communication with a recovery unit being wirelessly powered.
    Type: Application
    Filed: December 21, 2020
    Publication date: July 29, 2021
    Inventors: Behrooz Abiri, Seyed A. Hajimiri, Florian Bohn, Artsroun Darbinian, Dan Sturm, Farhud Tebbi
  • Publication number: 20080058019
    Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.
    Type: Application
    Filed: July 16, 2007
    Publication date: March 6, 2008
    Applicant: California Institute of Technology
    Inventors: Arun Natarajan, Abbas Komijani, Seyed Hajimiri
  • Publication number: 20070259632
    Abstract: The invention is a radio transmitter that includes an antenna having at least one driven element and at least one reflector element. The driven element is electrically coupled to a radio carrier source. At least one of the driven elements or the at least one reflector element, includes at least one switch to modulate the radio carrier. Also, a secure communication system includes a radio transmitter configured to transmit a modulated signal within an information beam width. Also, a method for modulating a radio signal includes the steps of causing the transmitted carrier signal to be modulated by the modulation signal in response to switching the at least one reflector switch. Also, a method for selecting desirable antenna reflector switch combinations includes performing a mathematical simulation to determine whether the combination of reflector switch positions results in a modulated signal that can be demodulated within an information beam width.
    Type: Application
    Filed: May 4, 2007
    Publication date: November 8, 2007
    Applicant: California Institute of Technology
    Inventors: Aydin Babakhani, David Rutledge, Seyed Hajimiri
  • Publication number: 20070086786
    Abstract: An electrical signal transformation device configured for emulation of physical, for example, optical, phenomena and/or a mathematical or logical process. The device employs a first plurality, second plurality and third plurality of electrical components each having a first terminal and a second terminal. The first plurality and second plurality of electrical components are arranged along a first direction and a second direction respectively, to form a planar two dimensional lattice. The first plurality of electrical components are configured to provide at least one of a constant signal propagation velocity and/or amplitude while the second plurality of electrical components are configured to provide at least one of a varying signal propagation velocity and/or amplitude. The lattice includes at least two input signal nodes and at least one output signal node and is configured to transform and communicate a plurality of input signals from the input node to the output node.
    Type: Application
    Filed: September 22, 2006
    Publication date: April 19, 2007
    Applicant: California Institute of Technology
    Inventors: Ehsan Afshari, Seyed Hajimiri
  • Publication number: 20070040553
    Abstract: Spectral scanning magnetic resonance imaging methods and systems. In preferred methods and systems of the invention, to measure the resonance spectrum of the target object, a plurality of excitation signals in different frequencies and/or waveform shapes are introduced simultaneously to the imaging volume through one or more excitation coils, and the response spectrum is measured also in real-time and/or after excitation. Systems of the invention can be compact and portable, with small magnets providing the deterministic inhomogeneous magnetic field. Preferred embodiments include integrated circuit transmitters and receivers. Preferred systems of the invention are suitable, for example, for point of care medical diagnostics.
    Type: Application
    Filed: August 7, 2006
    Publication date: February 22, 2007
    Inventors: Seyed Hajimiri, Arjang Hassibi, Hua Wang
  • Publication number: 20070030102
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Application
    Filed: April 28, 2006
    Publication date: February 8, 2007
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Hajimiri
  • Publication number: 20060121869
    Abstract: A fully integrated CMOS multi-element phased-array transmitter (transmitter) includes, in part, on-chip power amplifiers (PA), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional 1-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8 GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors in each transmitter path have independent access to all the phases of the VCO. The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (I) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.
    Type: Application
    Filed: September 29, 2005
    Publication date: June 8, 2006
    Applicant: California Institute of Technology
    Inventors: Arun Natarajan, Abbas Komijani, Seyed Hajimiri
  • Publication number: 20050258866
    Abstract: An apparatus and method for driving an output signal in a high speed integrated circuit. The apparatus and methods enable the output voltage swing from the driver to exceed the breakdown voltage of any individual element in the output driver. A high speed driver can utilize one or more transistors in a stacked configuration, such that the breakdown voltage of the entire stacked configuration is based on the number of transistors in the stack. The driver is configured to distribute the output voltage substantially equally among each of the stacked transistors, such that the driver is able to source an output voltage swing that is greater than the breakdown voltage of any individual transistor in the driver.
    Type: Application
    Filed: April 14, 2005
    Publication date: November 24, 2005
    Applicant: California Institute of Technology
    Inventors: Sam Mandegaran, Seyed Hajimiri
  • Publication number: 20050227660
    Abstract: A phased-array receiver is adapted so as to be fully integrated and fabricated on a single silicon substrate. The phased-array receiver is operative to receive a 24 GHz signal and may be adapted to include 8-elements formed in a SiGe BiCMOS technology. The phased-array receiver utilizes a heterodyne topology, and the signal combining is performed at an IF of 4.8 GHz. The phase-shifting with 4 bits of resolution is realized at the LO port of the first down-conversion mixer. A ring LC VCO generates 16 different phases of the LO. An integrated 19.2 GHz frequency synthesizer locks the VCO frequency to a 75 MHz external reference. Each signal path achieves a gain of 43 dB, a noise figure of 7.4 dB, and an IIP3 of ?11 dBm. The 8-path array achieves an array gain of 61 dB, a peak-to-null ratio of 20 dB, and improves the signal-to-noise ratio at the output by 9 dB.
    Type: Application
    Filed: November 12, 2004
    Publication date: October 13, 2005
    Applicant: California Institute of Technology
    Inventors: Hossein Hashemi, Xiang Guan, Seyed Hajimiri
  • Publication number: 20050163207
    Abstract: Apparatus and methods for equalizing the jitter on a communication line attributable to uncorrelated data coupled from one or more data lines in close proximity to the communication line. The crosstalk jitter induced by adjacent data lines can be equalized by detecting one or more data or state transitions in the adjacent data lines and comparing the timing of the one or more data or state transitions to the timing of one or more data or state transitions on the communication line. The state transitions can be compared to determine a mode and corresponding level of coupling. A time delay contributed by a variable time delay positioned in series with the communication line can be varied based in part on the level of coupling.
    Type: Application
    Filed: March 2, 2005
    Publication date: July 28, 2005
    Applicant: California Institute of Technology
    Inventors: James Buckwalter, Seyed Hajimiri
  • Publication number: 20050152488
    Abstract: An equalizer for serial data communications can be configured to compensate for the effects of deterministic jitter. The equalizer can be configured to compensate a received serial data stream for the effects of data-dependent jitter as well as duty cycle distortion jitter. The equalizer can be configured to determine the value of one or more previously received symbols and compare them to a recovered symbol. The equalizer can adjust a variable delay positioned in the serial data path to introduce a delay into the data path that is based in part on the received data stream. The equalizer can be configured to vary the delay when any of the one or more previously received symbols is different from the recovered symbol, and can be configured to maintain a constant delay if the one or more previously received symbols is the same as the recovered symbol.
    Type: Application
    Filed: December 14, 2004
    Publication date: July 14, 2005
    Applicant: California Institute of Technology
    Inventors: James Buckwalter, Seyed Hajimiri, Behnam Analui