Abstract: A user device determines whether a device connected to its headset jack is an audio accessory device. If the device connected to the headset jack is an audio accessory, the user device connects one or more pins of the headset jack to an audio codec. If the device plugged into the headset jack is not an audio accessory device, the user device connects one or more pins of the headset jack to alternate circuitry. The user device then determines, through the alternate circuitry, an electrical operating parameter requirement of the accessory device, and provides, from the alternate circuitry, the required operating parameter to the accessory device through the headset jack. The alternate circuitry may include an adjustable voltage regulator and/or an adjustable current regulator and the required operating parameter may be one or more of a voltage supply and a current supply.

Abstract: A user device determines whether a device connected to its headset jack is an audio accessory device. If the device connected to the headset jack is an audio accessory, the user device connects one or more pins of the headset jack to an audio codec. If the device plugged into the headset jack is not an audio accessory device, the user device connects one or more pins of the headset jack to alternate circuitry. The user device then determines, through the alternate circuitry, an electrical operating parameter requirement of the accessory device, and provides, from the alternate circuitry, the required operating parameter to the accessory device through the headset jack. The alternate circuitry may include an adjustable voltage regulator and/or an adjustable current regulator and the required operating parameter may be one or more of a voltage supply and a current supply.

Abstract: A methods for fabricating a capacitor structure includes fabricating polysilicon structures on a semiconductor substrate. The method further includes fabricating M1 to diffusion (MD) interconnects on the semiconductor substrate. The polysilicon structures are disposed in an interleaved arrangement with the MD interconnects. The method also includes selectively connecting the interleaved arrangement of the MD interconnects and/or the polysilicon structures as the capacitor structure.

Abstract: Power consumption of electronic components is reduced, particularly in a multi-chip package. Embodiments reduce parasitic capacitance of a semiconductor chip by reducing ESD protection circuitry that is not needed during operation of the package. ESD protection circuitry would be operational during production and/or testing of the chip, but some circuitry would be disabled or removed prior to normal operation of the multi-chip package.