Abstract: The present disclosure relates to an apparatus for obtaining a raw material which extracts a color raw material for cosmetics having a target color, wherein when a target color development value is input, raw material information is extracted using a genetic algorithm.

Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.

Abstract: There are provided a large-area single-crystal silver thin-film structure using a single-crystal copper thin-film buffer layer, and a method for manufacturing same. The large-area single-crystal silver thin-film structure includes a transparent substrate; a single-crystal copper thin-film buffer layer formed by deposition on the transparent substrate; and a single-crystal silver thin-film layer deposited on the single-crystal copper thin-film buffer layer and having a certain directionality.

Abstract: There is provided an RF sputtering apparatus for controlling an atomic layer of a thin film. The RF sputtering apparatus includes: a sputtering main body including a substrate, a target facing the substrate, and a chamber for performing a sputtering process to deposit the target on the substrate; a power supply unit connected to the target of the sputtering main body via a network to apply RF power; a roughing pump unit for forming vacuum inside the chamber of the sputtering main body; and a gas supply unit for supplying reaction gas to the inside of the chamber. A power cable for supplying a power source to the power supply unit is formed with a single crystal copper wire.

Abstract: A semiconductor package includes a magnetic layer including an inner portion having a predetermined area and an outer portion disposed outward of the inner portion, a lower polymer layer disposed below the magnetic layer, and a dicing surface formed by ends of the magnetic layer and the lower polymer layer and extending along a stacked direction of the magnetic layer and the lower polymer layer. At least a part of the outer portion of the magnetic layer includes an inclined surface inclined downward in the stacked direction, and has a thickness greater than a thickness of the inner portion in the stacked direction.

Abstract: The present invention relates to a pharmaceutical composition for administration in combination with a drug that causes acidosis. Acidosis occurs due to disrupted acid-base balance caused in a case where a large amount of acid is produced and accumulated in the body. There are many cases where acidosis occurs as a side effect associated with drugs for treating various diseases, which poses problems. The pharmaceutical composition of the present invention not only allows the intended purpose, for which a drug that causes acidosis is administered, to be maintained but also has a remarkable effect in decreasing the concentration of acid accumulated in an organism due to administration of the drug that causes acidosis. Thus, the pharmaceutical composition is expected to be widely used in the fields of medicine and health.

Abstract: The present invention relates to a pharmaceutical composition for preventing or treating acidosis. The pharmaceutical composition has a remarkable effect in decreasing the concentration of acid accumulated in an organism and thus is expected to be widely used in the fields of medicine and health.

Abstract: A semiconductor package includes a magnetic layer including an inner portion having a predetermined area and an outer portion disposed outward of the inner portion, a lower polymer layer disposed below the magnetic layer, and a dicing surface formed by ends of the magnetic layer and the lower polymer layer and extending along a stacked direction of the magnetic layer and the lower polymer layer. At least a part of the outer portion of the magnetic layer includes an inclined surface inclined downward in the stacked direction, and has a thickness greater than a thickness of the inner portion in the stacked direction.

Abstract: Provided is an electronic component package for electromagnetic interference shielding. The electronic component package for electromagnetic interference shielding according to an embodiment of the present invention comprises a substrate where electronic components are mounted, a molding member formed on the substrate and the electronic components, a magnetic layer formed on the molding member, and a conductive layer formed on the magnetic layer. Electromagnetic waves generated from the electronic components embeded in the molding member are absorbed in the magnetic layer to thus prevent or reduce harmful influence on other electronic components mounted in adjacent places. In addition, harmful electromagnetic waves generated from the outside may be shielded due to the conductive layer formed on the magnetic layer, thereby protecting electronic components embeded in the molding member from being influenced by the electromagnetic waves.

Abstract: A method for manufacturing an ultrafine single-crystalline metal wire is presented. The method continuously manufactures an ultrafine long single-crystalline wire by shaping a grown single-crystalline metal to have a circular or rectangular cross section and then by drawing the shape-processed single-crystalline metal using a drawing machine. Therefore, the method simplifies manufacturing procedures to reduce manufacturing costs and lowers electrical resistance of a produced metal wire to improve the quality of the produced metal wire. The method includes: a first step of growing a single-crystalline metal ingot using a Czochralski or a Bridgman method; a second step of subjecting the single-crystalline metal ingot to a shaping process such that the single-crystalline metal ingot has a certain shape; and a third step of completing the manufacture of an ultrafine single-crystalline metal wire by drawing the shape-processed single-crystalline metal.

Abstract: The present invention relates to an electrode having a multilayer nanomesh structure using single-crystalline copper and a method for manufacturing same, the electrode comprising: a substrate; a single-crystalline copper electrode layer formed on the substrate and having a hive-shaped pattern with a nano-sized line width; and a metal oxide layer formed on the single-crystalline copper electrode layer, this providing an electrode having excellent optical transmittance, low electrical sheet resistance, and excellent mechanical stability. The present invention is technically characterized by an electrode having a multilayer nanomesh structure using single-crystalline copper, the electrode comprising: a substrate; a single-crystalline copper electrode layer formed on the substrate and having a hive-shaped pattern with a nano-sized line width; and a metal oxide layer formed on the single-crystalline copper electrode layer.

Abstract: Provided is an electronic component package for electromagnetic interference shielding. The electronic component package for electromagnetic interference shielding according to an embodiment of the present invention comprises a substrate where electronic components are mounted, a molding member formed on the substrate and the electronic components, a magnetic layer formed on the molding member, and a conductive layer formed on the magnetic layer. Electromagnetic waves generated from the electronic components embeded in the molding member are absorbed in the magnetic layer to thus prevent or reduce harmful influence on other electronic components mounted in adjacent places. In addition, harmful electromagnetic waves generated from the outside may be shielded due to the conductive layer formed on the magnetic layer, thereby protecting electronic components embeded in the molding member from being influenced by the electromagnetic waves.

Abstract: Provided is an electronic component package for electromagnetic interference shielding. The electronic component package for electromagnetic interference shielding according to an embodiment of the present invention comprises a substrate where electronic components are mounted, a molding member formed on the substrate and the electronic components, a magnetic layer formed on the molding member, and a conductive layer formed on the magnetic layer. Electromagnetic waves generated from the electronic components embeded in the molding member are absorbed in the magnetic layer to thus prevent or reduce harmful influence on other electronic components mounted in adjacent places. In addition, harmful electromagnetic waves generated from the outside may be shielded due to the conductive layer formed on the magnetic layer, thereby protecting electronic components embeded in the molding member from being influenced by the electromagnetic waves.

Abstract: Provided is an electronic component package for electromagnetic interference shielding. The electronic component package for electromagnetic interference shielding according to an embodiment of the present invention comprises a substrate where electronic components are mounted, a molding member formed on the substrate and the electronic components, a magnetic layer formed on the molding member, and a conductive layer formed on the magnetic layer. Electromagnetic waves generated from the electronic components embeded in the molding member are absorbed in the magnetic layer to thus prevent or reduce harmful influence on other electronic components mounted in adjacent places. In addition, harmful electromagnetic waves generated from the outside may be shielded due to the conductive layer formed on the magnetic layer, thereby protecting electronic components embeded in the molding member from being influenced by the electromagnetic waves.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.

Abstract: A method of manufacturing a copper thin film using a single-crystal copper target, and more particularly, a method of manufacturing a copper thin film using a single-crystal copper target, wherein a copper thin film is deposited on a sapphire disk substrate through high-frequency sputtering using a single-crystal copper target grown through a Czochralski process, and may thus exhibit high quality in terms of crystallinity. The method includes depositing a copper thin film on a sapphire disk substrate through a high-frequency sputtering process using a disk-shaped single-crystal copper target obtained by cutting cylindrical single-crystal copper grown through a Czochralski process.

Abstract: The present invention relates to an electrode having a multilayer nanomesh structure using single-crystalline copper and a method for manufacturing same, the electrode comprising: a substrate; a single-crystalline copper electrode layer formed on the substrate and having a hive-shaped pattern with a nano-sized line width; and a metal oxide layer formed on the single-crystalline copper electrode layer, this providing an electrode having excellent optical transmittance, low electrical sheet resistance, and excellent mechanical stability. The present invention is technically characterized by an electrode having a multilayer nanomesh structure using single-crystalline copper, the electrode comprising: a substrate; a single-crystalline copper electrode layer formed on the substrate and having a hive-shaped pattern with a nano-sized line width; and a metal oxide layer formed on the single-crystalline copper electrode layer.

Abstract: The present invention relates to a method for manufacturing an ultrafine single-crystalline metal wire. The method continuously manufactures an ultrafine long single-crystalline wire by shaping a grown single-crystalline metal to have a circular or rectangular cross section and then by drawing the shape-processed single-crystalline metal using a drawing machine. Therefore, the method simplifies manufacturing procedures to reduce manufacturing costs and lowers electrical resistance of a produced metal wire to improve the quality of the produced metal wire. The method comprises: a first step of growing a single-crystalline metal ingot using a Czochralski or a Bridgman method; a second step of subjecting the single-crystalline metal ingot to a shaping process such that the single-crystalline metal ingot has a certain shape; and a third step of completing the manufacture of an ultrafine single-crystalline metal wire by drawing the shape-processed single-crystalline metal.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.