Abstract: An array substrate and a display panel. The array substrate includes a thin film transistor array layer including a driving transistor, a switching transistor, and a capacitor. The driving transistor includes a first active layer, a first gate insulating layer, a first gate, and an insulating dielectric layer sequentially stacked. The switching transistor includes a second active layer, a second gate insulating layer, and a second gate sequentially stacked. The insulating dielectric layer and the second gate insulating layer are located at a same layer. A thickness of the first gate insulating layer is greater than a thickness of the second gate insulating layer. The capacitor includes a first electrode plate and a second electrode plate. The first electrode plate and the first gate are disposed on same layer, and the second electrode plate and the second gate are disposed on same layer.

Abstract: The present invention relates to manufacturing methods of display panels. According to an embodiment, a method includes: providing an array substrate, the array substrate defining at least one mounting groove for providing a mounting space for a hardware structure, the mounting groove extending through the array substrate along a thickness direction of the array substrate, forming a package structure on a side of the array substrate for packing the organic light emitting unit. The mounting groove is exposed.

Abstract: An array substrate and a display panel. The array substrate includes a thin film transistor array layer including a driving transistor, a switching transistor, and a capacitor. The driving transistor includes a first active layer, a first gate insulating layer, a first gate, and an insulating dielectric layer sequentially stacked. The switching transistor includes a second active layer, a second gate insulating layer, and a second gate sequentially stacked. The insulating dielectric layer and the second gate insulating layer are located at a same layer. A thickness of the first gate insulating layer is greater than a thickness of the second gate insulating layer. The capacitor includes a first electrode plate and a second electrode plate. The first electrode plate and the first gate are disposed on same layer, and the second electrode plate and the second gate are disposed on same layer.

Abstract: The present invention relates to manufacturing methods of display panels. According to an embodiment, a method includes: providing an array substrate, the array substrate defining at least one mounting groove for providing a mounting space for a hardware structure, the mounting groove extending through the array substrate along a thickness direction of the array substrate, forming a package structure on a side of the array substrate for packing the organic light emitting unit. The mounting groove is exposed.

Abstract: The present disclosure relates to a display panel motherboard, a display panel, and a method of manufacturing the same, including a plurality of display substrates. The display substrate includes an organic light emitting unit; an array substrate, having at least one first area acting as a notch reserved area, and a second area different from the first area, the organic light emitting unit being formed on the array substrate and located on the second area; an encapsulation layer, formed on a side of the organic light emitting unit facing away from the array substrate and covering the notch reserved area; and an etch protection layer formed on a side of the encapsulation layer facing away from the array substrate.

Abstract: The present disclosure relates to a display panel motherboard, a display panel, and a method of manufacturing the same, including a plurality of display substrates. The display substrate includes an organic light emitting unit; an array substrate, having at least one first area acting as a notch reserved area, and a second area different from the first area, the organic light emitting unit being formed on the array substrate and located on the second area; an encapsulation layer, formed on a side of the organic light emitting unit facing away from the array substrate and covering the notch reserved area; and an etch protection layer formed on a side of the encapsulation layer facing away from the array substrate.