Patents by Inventor Shachar Raindel

Shachar Raindel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10331595
    Abstract: A method for interaction by a central processing unit (CPU) and peripheral devices in a computer includes allocating, in a memory, a work queue for controlling a first peripheral device of the computer. The CPU prepares a work request for insertion in the allocated work queue, the work request specifying an operation for execution by the first peripheral device. A second peripheral device of the computer submits an instruction to the first peripheral device to execute the work request that was prepared by the CPU and thereby to perform the operation specified by the work request.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: June 25, 2019
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shachar Raindel, Liran Liss
  • Patent number: 10303647
    Abstract: Computing apparatus includes a central processing unit (CPU), which is configured to run concurrently multiple virtual machines, including at least first and second virtual machines. A peripheral component bus is connected to communicate with the CPU. Multiple peripheral devices are connected to communicate via the bus with the CPU and with others of the peripheral devices, including at least first and second peripheral devices that are each respectively partitioned into at least first and second functional entities, which are respectively assigned to serve the at least first and second virtual machines. Access control logic is configured to forward peer-to-peer communications initiated by the functional entities between the peripheral devices over the bus while inhibiting access in the peer-to-peer communications between the functional entities that are assigned to different ones of the virtual machines.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: May 28, 2019
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adi Menachem, Shachar Raindel
  • Patent number: 10248610
    Abstract: A method for computing includes submitting a first command from a central processing unit (CPU) to a first peripheral device in a computer to write data in a first bus transaction over a peripheral component bus in the computer to a second peripheral device in the computer. A second command is submitted from the CPU to one of the first and second peripheral devices to execute a second bus transaction, subsequent to the first bus transaction, that will flush the data from the peripheral component bus to the second peripheral device. The first and second bus transactions are executed in response to the first and second commands. Following completion of the second bus transaction, the second peripheral device processes the written data in.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: April 2, 2019
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adi Menachem, Shachar Raindel
  • Patent number: 10218645
    Abstract: A method in a network node that includes a host and an accelerator, includes holding a work queue that stores work elements, a notifications queue that stores notifications of the work elements, and control indices for adding and removing the work elements and the notifications to and from the work queue and the notifications queue, respectively. The notifications queue resides on the accelerator, and at least some of the control indices reside on the host. Messages are exchanged between a network and the network node using the work queue, the notifications queue and the control indices.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: February 26, 2019
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Shachar Raindel, Yaniv Saar, Haggai Eran, Yishai Israel Hadas, Ari Zigler
  • Patent number: 10152441
    Abstract: Peripheral apparatus for use with a host computer includes an add-on device, which includes a first network port coupled to one end of a packet communication link and add-on logic, which is configured to receive and transmit packets containing data over the packet communication link and to perform computational operations on the data. A network interface controller (NIC) includes a host bus interface, configured for connection to the host bus of the host computer and a second network port, coupled to the other end of the packet communication link. Packet processing logic in the NIC is coupled between the host bus interface and the second network port, and is configured to translate between the packets transmitted and received over the packet communication link and transactions executed on the host bus so as to provide access between the add-on device and the resources of the host computer.
    Type: Grant
    Filed: May 14, 2016
    Date of Patent: December 11, 2018
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Liran Liss, Shachar Raindel, Shlomo Raikin, Adi Menachem, Yuval Itkin
  • Patent number: 10135739
    Abstract: A data processing device includes a first packet communication interface for communication with at least one host processor via a network interface controller (NIC) and a second packet communication interface for communication with a packet data network. A memory holds a flow state table containing context information with respect to multiple packet flows conveyed between the host processor and the network via the first and second interfaces packet communication interfaces. Acceleration logic, coupled between the first and second packet communication interfaces, performs computational operations on payloads of packets in the multiple packet flows using the context information in the flow state table.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: November 20, 2018
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shachar Raindel, Shlomo Raikin, Liran Liss
  • Patent number: 10120832
    Abstract: A method includes communicating between at least first and second devices over a bus in accordance with a bus address space, including providing direct access over the bus to a local address space of the first device by mapping at least some of the addresses of the local address space to the bus address space. In response to indicating, by the first device or the second device, that the second device requires to access a local address in the local address space that is not currently mapped to the bus address space, the local address is mapped to the bus address space, and the local address is accessed directly, by the second device, using the mapping.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: November 6, 2018
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shachar Raindel, Idan Burstein, Noam Bloch, Shlomo Raikin
  • Publication number: 20180241809
    Abstract: Techniques for facilitating load balancing in distributed computing systems are disclosed herein. In one embodiment, a method includes receiving, at a destination server, a request packet from a load balancer via the computer network requesting a remote direct memory access (“RDMA”) connection between an originating server and one or more other servers selectable by the load balancer. The method can also include configuring, at the destination server, a rule for processing additional packets transmittable to the originating server via the RDMA connection based on the received reply packet. The rule is configured to encapsulate an outgoing packet transmittable to the originating server with an outer header having a destination field containing a network address of the originating server and a source field containing another network address of the destination server.
    Type: Application
    Filed: February 21, 2017
    Publication date: August 23, 2018
    Inventors: Rohan Gandhi, Shachar Raindel, Daniel Firestone, Jitendra Padhye, Lihua Yuan
  • Patent number: 10009277
    Abstract: Communication apparatus includes a plurality of interfaces configured to be connected to a Layer-3 packet network and to serve as ingress and egress interfaces to receive and transmit packets from and to the network. Routing logic is coupled to process respective Layer-3 headers of the packets received through the ingress interfaces and to route the packets via the egress interfaces to respective destinations indicated by the Layer-3 headers. Congestion detection logic is coupled to identify a flow of the received packets that is causing congestion in the network and a Layer-3 address from which the flow originates, and to direct the routing logic to route a backward congestion notification message (CNM) packet via one of the egress interfaces to the identified Layer-3 address.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: June 26, 2018
    Assignee: Mellanox Technologies TLV Ltd.
    Inventors: Dror Goldenberg, Alex Shpiner, Gil Levy, Barak Gafni, Shachar Raindel
  • Publication number: 20180137030
    Abstract: Systems and methods for automatic generation of an exception detector for determining an overflow condition are provided. In one example, a method including receiving code corresponding to at least one block of the hardware module, wherein the code providing at least a first value for a first variable, a second value for a second variable, or an operation to be performed using at least one of the first variable or the second variable, is provided. The method may further include automatically generating an exception detector to determine whether an overflow condition is triggered by at least one of the operation, the first variable, or the second variable.
    Type: Application
    Filed: March 1, 2017
    Publication date: May 17, 2018
    Inventors: Shachar Raindel, Derek Chiou
  • Publication number: 20180067893
    Abstract: An originating host device in a distribution chain is provided upstream from multiple host devices including intermediary and terminating host devices. The originating host device includes a core with a generation application and a first RDMA NIC. The core: determines a plan for transferring data between the originating host device and the other host devices; and generates WQEs to implement the plan. The first RDMA NIC includes a read application, a descriptor application, and a reception application. The read application is configured such that the first RDMA NIC reads the WQEs from a first memory. The descriptor application is configured such that the first RDMA NIC: writes a portion of the WQEs directly from the first RDMA NIC to a second memory of the intermediary host device; and triggers a second RDMA NIC of the intermediary host device to process the portion of the WQEs stored in the second memory.
    Type: Application
    Filed: June 14, 2017
    Publication date: March 8, 2018
    Inventors: Shachar RAINDEL, Anirudh Badam, Jitendra Padhye
  • Patent number: 9894005
    Abstract: A method in a network element that includes multiple interfaces for connecting to a communication network includes receiving from the communication network via an ingress interface a flow including a sequence of packets, and routing the packets to a destination of the flow via a first egress interface. A permission indication for re-routing the flow is received in the ingress interface. In response to receiving the permission indication, subsequent packets of the flow are re-routed via a second egress interface that is different from the first egress interface. Further re-routing of the flow is refrained from, until receiving another permission indication.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: February 13, 2018
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shachar Raindel, Idan Burstein, Noam Bloch, Benny Koren, Barak Gafni, Dror Goldenberg, Liran Liss
  • Patent number: 9648081
    Abstract: A method for memory access is applied in a cluster of computers linked by a network. For a given computer, a respective physical memory range is defined including a local memory range within the local RAM of the given computer and a remote memory range allocated to the given compute within the local RAM of at least one other computer in the cluster, which is accessible via the network using the network interface controllers of the computers. When a memory operation is requested at a given address in the respective physical memory range, the operation is executed on the data in the local RAM of the given computer when the data at the given address are valid in the local memory range. Otherwise the data are fetched from the given address in the remote memory range to the local memory range before executing the operation on the data.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: May 9, 2017
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shlomo Raikin, Shachar Raindel, Michael Kagan
  • Patent number: 9639464
    Abstract: A method for data transfer includes receiving in an operating system of a host computer an instruction initiated by a user application running on the host processor identifying a page of virtual memory of the host computer that is to be used in receiving data in a message that is to be transmitted over a network to the host computer but has not yet been received by the host computer. In response to the instruction, the page is loaded into the memory, and upon receiving the message, the data are written to the loaded page.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: May 2, 2017
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Haggai Eran, Shachar Raindel, Liran Liss, Noam Bloch
  • Patent number: 9632901
    Abstract: A method for data transfer includes receiving in a data transfer operation data to be written by a peripheral device to a specified virtual address in a random access memory (RAM) of a host computer. Upon receiving the data, it is detected that a page that contains the specified virtual address is marked as not present in a page table of the host computer. The peripheral device receives a notification that the page is not present and an estimate of a length of time that will be required to make the page available and selects a mode for handling of the data transfer operation depending upon the estimate.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: April 25, 2017
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shlomo Raikin, Shachar Raindel, Noam Bloch, Liran Liss
  • Publication number: 20170041239
    Abstract: Communication apparatus includes a plurality of interfaces configured to be connected to a Layer-3 packet network and to serve as ingress and egress interfaces to receive and transmit packets from and to the network. Routing logic is coupled to process respective Layer-3 headers of the packets received through the ingress interfaces and to route the packets via the egress interfaces to respective destinations indicated by the Layer-3 headers. Congestion detection logic is coupled to identify a flow of the received packets that is causing congestion in the network and a Layer-3 address from which the flow originates, and to direct the routing logic to route a backward congestion notification message (CNM) packet via one of the egress interfaces to the identified Layer-3 address.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 9, 2017
    Inventors: Dror Goldenberg, Alex Shpiner, Gil Levy, Barak Gafni, Shachar Raindel
  • Publication number: 20170017609
    Abstract: Computing apparatus includes a central processing unit (CPU), which is configured to run concurrently multiple virtual machines, including at least first and second virtual machines. A peripheral component bus is connected to communicate with the CPU. Multiple peripheral devices are connected to communicate via the bus with the CPU and with others of the peripheral devices, including at least first and second peripheral devices that are each respectively partitioned into at least first and second functional entities, which are respectively assigned to serve the at least first and second virtual machines. Access control logic is configured to forward peer-to-peer communications initiated by the functional entities between the peripheral devices over the bus while inhibiting access in the peer-to-peer communications between the functional entities that are assigned to different ones of the virtual machines.
    Type: Application
    Filed: July 6, 2016
    Publication date: January 19, 2017
    Inventors: Adi Menachem, Shachar Raindel
  • Patent number: 9544239
    Abstract: Methods and systems are disclosed for network congestion management. The methods and systems receive a first packet complying with a first network protocol comprising a first congestion indicator representative of a presence or absence of network congestion and further comprising a first set of data associated with a second network protocol, and provide an indication of the presence or absence of network congestion generated based, at least in part, on the first congestion indicator. The methods and systems also receive a first packet complying with a first network protocol comprising a first set of data associated with a second network protocol, and output a second packet complying with the first network protocol comprising a first congestion indicator representative of a presence of network congestion.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 10, 2017
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Barak Gafni, Benny Koren, Freddy Gabbay, Zachy Hamamaty, Shachar Raindel
  • Publication number: 20160378709
    Abstract: A method for computing includes submitting a first command from a central processing unit (CPU) to a first peripheral device in a computer to write data in a first bus transaction over a peripheral component bus in the computer to a second peripheral device in the computer. A second command is submitted from the CPU to one of the first and second peripheral devices to execute a second bus transaction, subsequent to the first bus transaction, that will flush the data from the peripheral component bus to the second peripheral device. The first and second bus transactions are executed in response to the first and second commands. Following completion of the second bus transaction, the second peripheral device processes the written data in.
    Type: Application
    Filed: June 9, 2016
    Publication date: December 29, 2016
    Inventors: Adi Menachem, Shachar Raindel
  • Publication number: 20160342547
    Abstract: Peripheral apparatus for use with a host computer includes an add-on device, which includes a first network port coupled to one end of a packet communication link and add-on logic, which is configured to receive and transmit packets containing data over the packet communication link and to perform computational operations on the data. A network interface controller (NIC) includes a host bus interface, configured for connection to the host bus of the host computer and a second network port, coupled to the other end of the packet communication link. Packet processing logic in the NIC is coupled between the host bus interface and the second network port, and is configured to translate between the packets transmitted and received over the packet communication link and transactions executed on the host bus so as to provide access between the add-on device and the resources of the host computer.
    Type: Application
    Filed: May 14, 2016
    Publication date: November 24, 2016
    Inventors: Liran Liss, Shachar Raindel, Shlomo Raikin, Adi Menachem, Yuval Itkin