Abstract: Disclosed embodiments relate to enhanced auto-precharge memory scheduling. In one example, a system includes a memory having a matrix of storage cells, which, responsive to a row address strobe (RAS) signal, activates a given row, responsive to a column address strobe (CAS) signal, selects storage cells in the given row, and, responsive to a combined auto-precharge (AP) and CAS signal, accesses, then closes the given row. A memory controller selects a memory request from a memory request queue, generates the RAS signal to activate a row, when another memory request to the row is enqueued, generates the CAS signal to select a storage cell, when another memory request to a same bank but a different row is enqueued, generates the combined AP and CAS signal, and, when no memory request to the same bank is enqueued, generates the CAS signal only, allowing a close timer to close the row.

Abstract: Disclosed embodiments relate to enhanced auto-precharge memory scheduling. In one example, a system includes a memory having a matrix of storage cells, which, responsive to a row address strobe (RAS) signal, activates a given row, responsive to a column address strobe (CAS) signal, selects storage cells in the given row, and, responsive to a combined auto-precharge (AP) and CAS signal, accesses, then closes the given row. A memory controller selects a memory request from a memory request queue, generates the RAS signal to activate a row, when another memory request to the row is enqueued, generates the CAS signal to select a storage cell, when another memory request to a same bank but a different row is enqueued, generates the combined AP and CAS signal, and, when no memory request to the same bank is enqueued, generates the CAS signal only, allowing a close timer to close the row.

Abstract: In one embodiment, a conflict detection logic is configured to receive a plurality of memory requests from an arbiter of a coherent fabric of a system on a chip (SoC). The conflict detection logic includes snoop filter logic to downgrade a first snooped memory request for a first address to an unsnooped memory request when an indicator associated with the first address indicates that the coherent fabric has control of the first address. Other embodiments are described and claimed.

Abstract: An apparatus and method for efficient handling of critical chunks. For example, one embodiment of an apparatus comprises a plurality of agents to perform a respective plurality of data processing functions, at least one of the data processing functions comprising transmitting and receiving chunks of data to and from a memory controller, respectively; a system agent to coordinate requests for transmitting and receiving the chunks of data to and from the memory controller, the system agent comprising: a memory for temporarily storing the chunks of data during transmission between the agents and the memory controller; and scheduling logic to prioritize critical chunks over non-critical chunks across multiple outstanding requests while ensuring that the non-critical chunks do not result in starvation.

Abstract: An apparatus and method for efficient handling of critical chunks. For example, one embodiment of an apparatus comprises a plurality of agents to perform a respective plurality of data processing functions, at least one of the data processing functions comprising transmitting and receiving chunks of data to and from a memory controller, respectively; a system agent to coordinate requests for transmitting and receiving the chunks of data to and from the memory controller, the system agent comprising: a memory for temporarily storing the chunks of data during transmission between the agents and the memory controller; and scheduling logic to prioritize critical chunks over non-critical chunks across multiple outstanding requests while ensuring that the non-critical chunks do not result in starvation.

Abstract: In one embodiment, a conflict detection logic is configured to receive a plurality of memory requests from an arbiter of a coherent fabric of a system on a chip (SoC). The conflict detection logic includes snoop filter logic to downgrade a first snooped memory request for a first address to an unsnooped memory request when an indicator associated with the first address indicates that the coherent fabric has control of the first address. Other embodiments are described and claimed.