Patents by Inventor Shahaf Shuler

Shahaf Shuler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260211838
    Abstract: Systems and methods are directed toward virtualizing network connections to transparently apply one or more connection policies responsive to features of a connection request. A network connection request may be analyzed to determine one or more features that can be used to select a connection policy for the request. A modified network connection may be established using one or more connection parameters from the connection policy. As incoming data transmission are received, the data packages may be intercepted and then modified for transmission according to the connection policy.
    Type: Application
    Filed: October 12, 2023
    Publication date: July 23, 2026
    Inventors: Moosa Baransi, Sayantan Sur, Lijun Yu, Yossef Efraim, Masoud Moshref Javadi, Tzachi Perelstein, Ido Moshe Benda, Shahaf Shuler, Omri Ben David, Eliav Bar-Ilan, Ali Ayoub, Majd Debini, Nisan Vaknin
  • Publication number: 20260154104
    Abstract: Techniques described herein include managing scheduling of interrupts by receiving a data packet comprising an indication of an interrupt to be delivered, determining an availability status of a processing thread, and managing an interrupt status indicator in response to determining the availability status. A value of the interrupt status indicator corresponds to a quantity of pending interrupts. An event handling circuit processes the interrupt or one or more pending interrupts using the processing thread.
    Type: Application
    Filed: January 21, 2026
    Publication date: June 4, 2026
    Inventors: Sayantan Sur, Shahaf Shuler, Doron Haim, Netanel Moshe Gonen, Stephen Anthony Bernard Jones
  • Patent number: 12554531
    Abstract: Techniques described herein include managing scheduling of interrupts by receiving a data packet comprising an indication of an interrupt to be delivered, determining an availability status of a processing thread, and managing an interrupt status indicator in response to determining the availability status. A value of the interrupt status indicator corresponds to a quantity of pending interrupts. An event handling circuit processes the interrupt or one or more pending interrupts using the processing thread.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: February 17, 2026
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Sayantan Sur, Shahaf Shuler, Doron Haim, Netanel Moshe Gonen, Stephen Anthony Bernard Jones
  • Publication number: 20250363203
    Abstract: The technology disclosed herein enables selective clearing of memory regions upon a context switch. An example method includes the operations of: determining an identifier of a current execution context associated with a memory region; determining an identifier of a previous execution context specified by metadata associated with the memory region; responsive to determining that the identifier of the current execution context does not match the identifier of the previous execution context, associating the memory region with the current execution context; and clearing at least a part of the memory region.
    Type: Application
    Filed: August 6, 2025
    Publication date: November 27, 2025
    Inventors: Ahmad Atamli, Ilan Pardo, Miriam Menes, Shahaf Shuler, Meni Orenbach, Uria Basher, Gabi Liron
  • Patent number: 12444013
    Abstract: A kernel comprising at least one dynamically configurable parameter is submitted by a processor. The kernel is to be executed at a later time. Data is received after the kernel has been submitted. The at least one dynamically configurable parameter of the kernel is updated based on the data. The kernel having the at least one updated dynamically configurable parameter is executed after the at least one dynamically configurable parameter has been updated.
    Type: Grant
    Filed: February 22, 2024
    Date of Patent: October 14, 2025
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Sayantan Sur, Stephen Anthony Bernard Jones, Shahaf Shuler
  • Patent number: 12436909
    Abstract: A networking device, system, and method of operating a networking device are provided. The illustrative networking device is disclosed to include one or more physical ports, an emulated switch positioned between the one or more physical ports and a host device, and one or more emulated devices positioned between the emulated switch and the one or more physical ports. The one or more emulated devices may be configured to populate the one or more physical ports.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: October 7, 2025
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Shahaf Shuler, Peter Paneah, Tzuriel Katoa
  • Patent number: 12417278
    Abstract: The technology disclosed herein enables selective clearing of memory regions upon a context switch. An example method includes the operations of: receiving a memory access request referencing a memory region; determining an identifier of a current execution context associated with the memory region; determining an identifier of a previous execution context specified by metadata associated with the memory region; responsive to determining that the identifier of the current execution context does not match the identifier of the previous execution context, updating the metadata associated with the memory region to store the identifier of the current execution context; clearing at least a part of the memory region; and processing the memory access request with respect to the memory region.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: September 16, 2025
    Assignee: Mellanox Technologies Ltd.
    Inventors: Ahmad Atamli, Ilan Pardo, Miriam Menes, Shahaf Shuler, Meni Orenbach, Uria Basher, Gabi Liron
  • Publication number: 20250173177
    Abstract: Systems and methods are directed toward virtualizing network connections to transparently apply one or more connection policies responsive to features of a connection request. A network connection between two hosts may be established using a service associated with the respective hosts and connection information may be provided to an underlying hardware resources. When data transmission requests are received, the underlying hardware resource may determine the appropriate connection settings for data transmission without querying additional logs or hardware resources.
    Type: Application
    Filed: January 16, 2025
    Publication date: May 29, 2025
    Inventors: Moosa Baransi, Sayantan Sur, Lijun Yu, Yossef Efraim, Masoud Moshref Javadi, Tzachi Perelstein, Ido Moshe Benda, Shahaf Shuler, Omri Ben David, Eliav Bar-Ilan, Ali Ayoub, Majd Debini, Nisan Vaknin, Ariel Shahar
  • Patent number: 12248416
    Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.
    Type: Grant
    Filed: May 6, 2024
    Date of Patent: March 11, 2025
    Assignee: Mellanox Technologies, Ltd
    Inventors: Daniel Marcovitch, Eliav Bar-Ilan, Ran Avraham Koren, Liran Liss, Oren Duer, Shahaf Shuler
  • Publication number: 20250080315
    Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.
    Type: Application
    Filed: November 18, 2024
    Publication date: March 6, 2025
    Inventors: Dotan David Levi, Ariel Shahar, Shahaf Shuler, Ariel Almog, Eitan Hirshberg, Natan Manevich
  • Patent number: 12231401
    Abstract: In one embodiment, a data communication device includes a network interface controller to process packets received from at least one of a host device for sending over a network, and at least one remote device over the network, at least one processor to execute computer instructions to receive a configuration, and extract filtering rules from the configuration, and at least one hardware accelerator to receive the filtering rules from the at least one processor, and filter the packets based on the rules so that some of the packets are dropped and some of the packets are forwarded to the at least one processor to send data based on the forwarded packets to another device.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: February 18, 2025
    Assignee: Mellanox Technologies, Ltd
    Inventors: Chen Rozenbaum, Shaul Arazi, Shahaf Shuler, Gary Mataev
  • Patent number: 12177325
    Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: December 24, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Dotan David Levi, Ariel Shahar, Shahaf Shuler, Ariel Almog, Eitan Hirshberg, Natan Manevich
  • Publication number: 20240289288
    Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.
    Type: Application
    Filed: May 6, 2024
    Publication date: August 29, 2024
    Inventors: Daniel Marcovitch, Eliav Bar-Ilan, Ran Avraham Koren, Liran Liss, Oren Duer, Shahaf Shuler
  • Publication number: 20240272924
    Abstract: Systems and methods are presented that reduce the downtime of communication when updating backend software of an accelerated emulation system. In at least one embodiment, by first transferring the context of the running software to the updated software and rebuilding the context map for the communication and programming the context in the accelerated emulated device, downtime can be reduced by only enabling the new software and disabling the original software after the context map has been rebuilt as the last stage of execution.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 15, 2024
    Inventors: Parav Pandit, Oren Duer, Max Gurtovoy, Eliav Bar-Ilan, Shahaf Shuler
  • Publication number: 20240233066
    Abstract: A kernel comprising at least one dynamically configurable parameter is submitted by a processor. The kernel is to be executed at a later time. Data is received after the kernel has been submitted. The at least one dynamically configurable parameter of the kernel is updated based on the data. The kernel having the at least one updated dynamically configurable parameter is executed after the at least one dynamically configurable parameter has been updated.
    Type: Application
    Filed: February 22, 2024
    Publication date: July 11, 2024
    Inventors: Sayantan Sur, Stephen Anthony Bernard Jones, Shahaf Shuler
  • Publication number: 20240231888
    Abstract: Techniques described herein include managing scheduling of interrupts by receiving a data packet comprising an indication of an interrupt to be delivered, determining an availability status of a processing thread, and managing an interrupt status indicator in response to determining the availability status. A value of the interrupt status indicator corresponds to a quantity of pending interrupts. An event handling circuit processes the interrupt or one or more pending interrupts using the processing thread.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 11, 2024
    Inventors: Sayantan Sur, Shahaf Shuler, Doron Haim, Netanel Moshe Gonen, Stephen Anthony Bernard Jones
  • Publication number: 20240202315
    Abstract: The technology disclosed herein enables selective clearing of memory regions upon a context switch. An example method includes the operations of: receiving a memory access request referencing a memory region; determining an identifier of a current execution context associated with the memory region; determining an identifier of a previous execution context specified by metadata associated with the memory region; responsive to determining that the identifier of the current execution context does not match the identifier of the previous execution context, updating the metadata associated with the memory region to store the identifier of the current execution context; clearing at least a part of the memory region; and processing the memory access request with respect to the memory region.
    Type: Application
    Filed: December 20, 2022
    Publication date: June 20, 2024
    Inventors: Ahmad Atamli, Ilan Pardo, Miriam Menes, Shahaf Shuler, Meni Orenbach, Uria Basher
  • Patent number: 12007921
    Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: June 11, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Daniel Marcovitch, Eliav Bar-Ilan, Ran Avraham Koren, Liran Liss, Oren Duer, Shahaf Shuler
  • Publication number: 20240143528
    Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Inventors: Daniel Marcovitch, Eliav Bar-Ilan, Ran Avraham Koren, Liran Liss, Oren Duer, Shahaf Shuler
  • Publication number: 20240134681
    Abstract: Techniques described herein include managing scheduling of interrupts by receiving a data packet comprising an indication of an interrupt to be delivered, determining an availability status of a processing thread, and managing an interrupt status indicator in response to determining the availability status. A value of the interrupt status indicator corresponds to a quantity of pending interrupts. An event handling circuit processes the interrupt or one or more pending interrupts using the processing thread.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Sayantan Sur, Shahaf Shuler, Doron Haim, Netanel Moshe Gonen, Stephen Anthony Bernard Jones