Abstract: Apparatuses for a projectile are provided, the projectile configured for weapons band launching, examples of the apparatus comprising a body, an inflation system and external walls. The body is inflatable by the inflation system, from a deflated configuration having a first volume to an inflated configuration having a second volume, greater than the first volume. The external walls are deployable from an undeployed configuration to a deployed configuration responsive to the body being inflated. In the undeployed configuration and at an operating airspeed, the center of pressure is located at a first position with respect to the projectile. In the deployed configuration the external walls provide a deployed external surface geometry exposed to an airflow corresponding to the operating airspeed, such that the center of pressure is located at a second position with respect to the projectile, different from the first position.

Abstract: Apparatuses for a projectile are provided, the projectile configured for weapons band launching, examples of the apparatus comprising a body, an inflation system and external walls. The body is inflatable by the inflation system, from a deflated configuration having a first volume to an inflated configuration having a second volume, greater than the first volume. The external walls are deployable from an undeployed configuration to a deployed configuration responsive to the body being inflated. In the undeployed configuration and at an operating airspeed, the center of pressure is located at a first position with respect to the projectile. In the deployed configuration the external walls provide a deployed external surface geometry exposed to an airflow corresponding to the operating airspeed, such that the center of pressure is located at a second position with respect to the projectile, different from the first position.

Abstract: A method and system for using non-volatile memory as a replacement for volatile memory are provided. In one embodiment, a host is in communication with a memory system having volatile memory, a first non-volatile memory, and a second non-volatile memory, wherein the first non-volatile memory has a faster performance and a higher endurance than the second non-volatile memory. The host analyzes data to be stored in the volatile memory to determine if it should instead be stored in the first non-volatile memory. If the data should be stored in the volatile memory, the host stores the data in the volatile memory. If the data should be stored in the first non-volatile memory, the host stores the data in the first non-volatile memory.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A method and system for using a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in a ROM of a device. The computing device compares the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code. The computing device then compiles the difference(s) (sometimes, after adjusting the differences) and generates a ROM patch by converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device. In another embodiment, a method and system for using a ROM patch are disclosed.

Abstract: The present application is directed to systems and methods for managing data in a device for hibernation states. In one implementation, the device includes an interface and a processor. The interface is coupled with a first memory and a second memory. The processor is in communication with the first and second memories via the interface. The processor is configured to read first data from the first memory, generate image data of the data stored in the first memory based on the first data, and write to the second memory prior to the device entering an initial hibernation state the image data of the data stored in the first memory. The processor is further configured to, after the device awakes from the initial hibernation state, read the image data from the second memory, reconstruct the first data based on the image data, and write the first data to the first memory.

Abstract: A method and system for generating a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in a ROM of a device. The computing device compares the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code. The computing device then compiles the difference(s) (sometimes, after adjusting the differences) and generates a ROM patch by converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device. In another embodiment, a method and system for using a ROM patch are disclosed.

Abstract: A method and system for using non-volatile memory as a replacement for volatile memory are provided. In one embodiment, a host is in communication with a memory system having volatile memory, a first non-volatile memory, and a second non-volatile memory, wherein the first non-volatile memory has a faster performance and a higher endurance than the second non-volatile memory. The host analyzes data to be stored in the volatile memory to determine if it should instead be stored in the first non-volatile memory. If the data should be stored in the volatile memory, the host stores the data in the volatile memory. If the data should be stored in the first non-volatile memory, the host stores the data in the first non-volatile memory.

Abstract: A method and system for using a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in a ROM of a device. The computing device compares the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code. The computing device then compiles the difference(s) (sometimes, after adjusting the differences) and generates a ROM patch by converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device. In another embodiment, a method and system for using a ROM patch are disclosed.

Abstract: A method and system for generating a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in a ROM of a device. The computing device compares the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code. The computing device then compiles the difference(s) (sometimes, after adjusting the differences) and generates a ROM patch by converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device. In another embodiment, a method and system for using a ROM patch are disclosed.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: A storage module and host device for storage module defragmentation are disclosed. In one embodiment, a host controller sends a storage module a first set of logical block addresses of a file stored in the storage module. The host controller receives a metric from the storage module indicative of a fragmentation level of the file in physical blocks of memory in the storage module. If the metric is greater than a threshold, the host controller reads the file and then writes it back to the storage module using a different set of logical block addresses. To avoid sending the file back and forth, in another embodiment, the host controller sends the fragmentation threshold and the different set of logical block addresses to the storage module. The storage module then moves the file itself if the metric indicative of the fragmentation level is greater than the threshold. Other embodiments are provided.

Abstract: Programmer's data that is transferred from a programming device to a storage device is initially stored in a memory device of the storage device by using a durable data-retention storage setup. After the storage device is embedded in a host device, the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup. Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells of the memory device as conventional SBC cells or as unconventional MBC cells. After the storage device is embedded in a host device, the programmer's data, or selected parts thereof, is read from the memory device and rewritten into it by operating selected memory cells of the memory device as conventional MBC cells.

Abstract: Programmer's data that is transferred from a programming device to a storage device is initially stored in a memory device of the storage device by using a durable data-retention storage setup. After the storage device is embedded in a host device, the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup. Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells of the memory device as conventional SBC cells or as unconventional MBC cells. After the storage device is embedded in a host device, the programmer's data, or selected parts thereof, is read from the memory device and rewritten into it by operating selected memory cells of the memory device as conventional MBC cells.

Abstract: Programmer's data that is transferred from a programming device (160) to a storage device (100) is initially stored in a memory device (120) of the storage device (100) by using a durable data-retention storage setup (210). After the storage device is embedded in a host device (170), the programmer's data is internally (i.e., in the storage device) read from the memory device and rewritten into the memory device by using a conventional storage setup (220). Using a durable data-retention storage setup may include temporarily (i.e., before the storage device is embedded in a host) operating selected memory cells (124) of the memory device as conventional single-bit per cell (SBC) cells or as unconventional multi-bit per cell (MBC) cells. After the storage device (100) is embedded in a host device (170), the programmer's data, or selected parts thereof, is read from the memory device (120) and rewritten into it by operating selected memory cells (126, 128) of the memory device as conventional MBC cells.