Patents by Inventor Shahid Butt

Shahid Butt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170288
    Abstract: A stack structure that includes: a device wafer, a handler wafer, and a bonding structure disposed between the device wafer and the handler wafer, wherein one or both of the device wafer and the handler wafer have a release layer that is configured to be substantially or completely vaporized by infrared ablation when exposed to an infrared laser energy. The device wafer includes at least two consecutive layers adjacent the bonding structure that together include a plurality of fill portions that substantially or completely disable entry of the infrared laser energy into a plurality of layers of the device wafer below the two consecutive layers adjacent the bonding structure.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Inventors: Mukta Ghate Farooq, Qianwen Chen, Shahid Butt, Eric Perfecto, Michael P. Belyansky, Katsuyuki Sakuma, John Knickerbocker
  • Patent number: 7413833
    Abstract: An active area pattern is formed atop a deep trench pattern with a single exposure using an alternative phase-shift mask. To prevent adjacent spaces of opposite phase from intersecting one another at the ends of substantially opaque features of the active area pattern, one or more connectors are used to connect the ends of the substantially opaque patterns. Trench regions of the deep trench pattern are arranged such that the conduction path of the connectors are interrupted and prevent the lines from shorting to one another. Alternatively, a bit line pattern or a word line pattern having a lines and spaces array and a support region are printed with a single exposure using an alternating phase-shift mask. At one end of the array region, lines having a respective phase shift extend into the support region, and lines of the opposite phase shift are terminated.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: August 19, 2008
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Shahid Butt, Scott Bukofsky, Ramachandra Divakaruni, Carl Radens, Wayne Ellis
  • Publication number: 20070264729
    Abstract: A method of reducing parametric variation in an integrated circuit (IC) chip and an IC chip with reduced parametric variation. The method includes: on a first wafer having a first arrangement of chips, each IC chip divided into a second arrangement of regions, measuring a test device parameter of test devices distributed in different regions; and on a second wafer having the first arrangement of IC chips and the second arrangement of regions, adjusting a functional device parameter of identically designed field effect transistors within one or more regions of all IC chips of the second wafer based on a values of the test device parameter measured on test devices in regions of the IC chip of the first wafer by a non-uniform adjustment of physical or metallurgical polysilicon gate widths of the identically designed field effect transistors from region to region within each IC chip.
    Type: Application
    Filed: May 10, 2006
    Publication date: November 15, 2007
    Inventors: Brent Anderson, Shahid Butt, Allen Gabor, Patrick Lindo, Edward Nowak, Jed Rankin
  • Publication number: 20070041003
    Abstract: A method for optimizing imaging and process parameter settings in a lithographic pattern imaging and processing system. The method includes correlating the dimensions of a first set of at least one control pattern printed in a lithographic resist layer, measured at three or more locations on or within the pattern which correspond to differing dose, defocus and blur sensitivity. The method then includes measuring the dimensions on subsequent sets of control patterns, printed in a lithographic resist layer, at three or more locations on or within each pattern, of which a minimum of three locations match those measured in the first set, and determining the effective dose, defocus and blur values associated with forming the subsequent sets of control patterns by comparing the dimensions at the matching locations with the correlated dependencies.
    Type: Application
    Filed: August 18, 2005
    Publication date: February 22, 2007
    Applicant: International Business Machines Corporation
    Inventors: Christopher Ausschnitt, Timothy Brunner, Shahid Butt, Daniel Corliss
  • Patent number: 7074529
    Abstract: The relative surface area sizes of portions having distinct phase-shift and transmission of light of a pattern on a phase-shift mask substantially obey the condition that the product of surface area and transmission of the electrical field strength is the same for all of the portions. Then, frequency doubling occurs due to vanishing zero order diffraction orders and in the case of high-transition attenuated phase-shift masks a large first order diffraction amplitude reveals an even an improved as compared with conventional phase-shift masks. Two-dimensional matrix-like structures particularly on attenuated or halftone phase-shift masks can be arranged to image high-density patterns on a semiconductor wafer. The duty cycles of pattern matrices can be chosen being different from one in two orthogonal directions nevertheless leading to frequency doubling.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: July 11, 2006
    Assignee: Infineon Technologies AG
    Inventors: Shahid Butt, Gerhard Kunkel
  • Patent number: 7074525
    Abstract: Non-uniformity and image shortening are substantially reduced in an image printed on a substrate using a photolithographic mask in which the mask pattern includes at least one lines and spaces array adjacent to at least one clear region. At least one line feature is incorporated within the clear region of the mask pattern and is disposed in proximity to the lines and spaces array. The line feature has a line width that is smaller than a minimum resolution of the optical projection system. The image is printed by illuminating the photolithographic mask and projecting light transmitted through the photolithographic mask onto the substrate using the optical projection system.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: July 11, 2006
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Chung-Hsi J. Wu, Timothy Allan Brunner, Shahid Butt, Patrick Speno
  • Patent number: 7056628
    Abstract: A mask is configured for projecting a structure pattern onto a semiconductor substrate in an exposure unit. The exposure unit has a minimum resolution limit for projecting the structure pattern onto the semiconductor substrate. The mask has a substrate, at least one raised first structure element on the substrate which has a lateral extent which is at least the minimum lateral extent that can be attained by the exposure unit, a configuration second raised structure elements which are arranged in an area surrounding the at least one first structure element on the substrate in the form of a matrix with a row spacing and a column spacing, whose shape and size are essentially identical to one another, and which have a respective lateral extent that is less than the minimum resolution limit of the exposure unit.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: June 6, 2006
    Assignee: Infineon Technologies AG
    Inventors: Shahid Butt, Henning Haffner
  • Patent number: 7016027
    Abstract: A method and system for detecting the quality of an alternating phase shift mask having a number of 180-degree phase shift areas alternating with a number of 0-degree phase shift areas is disclosed. In operation, a light source which provides wavelength-adjustable incident lights illuminates the incident lights on the alternating phase shift mask. The light outputs from boundaries between the 0-degree phase shift areas and the 180-degree phase shift areas of the alternating phase shift mask are detected. Relation curves of the wavelength of the incident light and a light intensity of the boundaries are then calculated. Phase errors of the alternating phase shift mask can thus be measured from the relation curves.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: March 21, 2006
    Assignee: Infineon Technologies AG
    Inventors: Shahid Butt, Shoaib Zaidi
  • Publication number: 20050255387
    Abstract: An active area pattern is formed atop a deep trench pattern with a single exposure using an alternative phase-shift mask. To prevent adjacent spaces of opposite phase from intersecting one another at the ends of substantially opaque features of the active area pattern, one or more connectors are used to connect the ends of the substantially opaque patterns. Trench regions of the deep trench pattern are arranged such that the conduction path of the connectors are interrupted and prevent the lines from shorting to one another. Alternatively, a bit line pattern or a word line pattern having a lines and spaces array and a support region are printed with a single exposure using an alternating phase-shift mask. At one end of the array region, lines having a respective phase shift extend into the support region, and lines of the opposite phase shift are terminated.
    Type: Application
    Filed: May 14, 2004
    Publication date: November 17, 2005
    Applicants: Infineon Technologies North America Corp., International Business Machines Corporation
    Inventors: Shahid Butt, Scott Bukofsky, Ramachandra Divakaruni, Carl Radens, Wayne Ellis
  • Patent number: 6940583
    Abstract: A method of projecting a pattern from a mask onto a substrate comprises providing an energy source, a substrate, and a mask containing a pattern of features to be projected onto the substrate, and projecting an energy beam from the energy source though the mask toward the substrate to create a projected mask pattern image. The projected mask pattern image is created by zeroth and higher orders of the energy beam. The method then includes diffracting zeroth order beams of the projected mask pattern image to an extent that prevents the zeroth order beams from reaching the substrate, while permitting higher order beams of the projected mask pattern image to reach the substrate. Preferably, the zeroth order beams of the projected mask pattern image are diffracted at an obtuse angle.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: September 6, 2005
    Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.
    Inventors: Shahid Butt, Martin Burkhardt
  • Publication number: 20050168753
    Abstract: The properties of features formed in a substrate are measured. Interferometric illumination is used to illuminate regions of a substrate so that the features of interest occupy a greater proportion of the illuminated area. The signal-to-noise ratio of the measurement signal is therefore increased, and the sensitivity of the measurement is thus improved.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 4, 2005
    Applicant: Infineon Technologies North America Corp.
    Inventors: Shahid Butt, Syed Shoaib Zaidi
  • Publication number: 20050024618
    Abstract: A method of projecting a pattern from a mask onto a substrate comprises providing an energy source, a substrate, and a mask containing a pattern of features to be projected onto the substrate, and projecting an energy beam from the energy source though the mask toward the substrate to create a projected mask pattern image. The projected mask pattern image is created by zeroth and higher orders of the energy beam. The method then includes diffracting zeroth order beams of the projected mask pattern image to an extent that prevents the zeroth order beams from reaching the substrate, while permitting higher order beams of the projected mask pattern image to reach the substrate. Preferably, the zeroth order beams of the projected mask pattern image are diffracted at an obtuse angle.
    Type: Application
    Filed: July 28, 2003
    Publication date: February 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shahid Butt, Martin Burkhardt
  • Publication number: 20050009312
    Abstract: An electronic device including: a semiconductor substrate having an array of gate conductors, each having a length and a width, comprised of dummy gate conductors and functional gate conductors extending in a widthwise direction, the gate conductors positioned substantially parallel to each other in the widthwise direction and periodically spaced apart a fixed distance in a direction substantially perpendicular to the widthwise direction.
    Type: Application
    Filed: June 26, 2003
    Publication date: January 13, 2005
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, INFINEON NORTH AMERICA CORP
    Inventors: Shahid Butt, Wayne Ellis, John Gabric
  • Patent number: 6842222
    Abstract: A projected image is formed during a material substrate. A photolithographic mask is illuminated with substantially coherent light at an oblique angle of incidence with respect to a surface of the photolithographic mask. The photolithographic mask includes a substantially transparent mask substrate and one or more lines and spaces patterns formed on the mask substrate and having a periodicity P. The mask substrate includes at least one phase shifting region. At least part of the light that is transmitted through the photolithographic mask is collected using one or more projection lenses which project the portion of the transmitted light onto the material substrate. The material substrate is disposed substantially parallel with, but at a distance from, a focal plane of the projection lens system.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: January 11, 2005
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Kunkel, Shahid Butt, Alan Thomas, Juergen Preuninger
  • Publication number: 20040229134
    Abstract: The relative surface area sizes of portions having distinct phase-shift and transmission of light of a pattern on a phase-shift mask substantially obey the condition that the product of surface area and transmission of the electrical field strength is the same for all of the portions. Then, frequency doubling occurs due to vanishing zero order diffraction orders and in the case of high-transition attenuated phase-shift masks a large first order diffraction amplitude reveals an even an improved as compared with conventional phase-shift masks. Two-dimensional matrix-like structures particularly on attenuated or halftone phase-shift masks can be arranged to image high-density patterns on a semiconductor wafer. The duty cycles of pattern matrices can be chosen being different from one in two orthogonal directions nevertheless leading to frequency doubling.
    Type: Application
    Filed: February 27, 2004
    Publication date: November 18, 2004
    Inventors: Shahid Butt, Gerhard Kunkel
  • Publication number: 20040223145
    Abstract: A method and system for detecting the quality of an alternating phase shift mask having a number of 180-degree phase shift areas alternating with a number of 0-degree phase shift areas is disclosed. In operation, a light source which provides wavelength-adjustable incident lights illuminates the incident lights on the alternating phase shift mask. The light outputs from boundaries between the 0-degree phase shift areas and the 180-degree phase shift areas of the alternating phase shift mask are detected. Relation curves of the wavelength of the incident light and a light intensity of the boundaries are then calculated. Phase errors of the alternating phase shift mask can thus be measured from the relation curves.
    Type: Application
    Filed: May 8, 2003
    Publication date: November 11, 2004
    Inventors: Shahid Butt, Shoaib Zaidi
  • Publication number: 20040219435
    Abstract: Non-uniformity and image shortening are substantially reduced in an image printed on a substrate using a photolithographic mask in which the mask pattern includes at least one lines and spaces array adjacent to at least one clear region. At least one line feature is incorporated within the clear region of the mask pattern and is disposed in proximity to the lines and spaces array. The line feature has a line width that is smaller than a minimum resolution of the optical projection system. The image is printed by illuminating the photolithographic mask and projecting light transmitted through the photolithographic mask onto the substrate using the optical projection system.
    Type: Application
    Filed: April 29, 2003
    Publication date: November 4, 2004
    Applicants: Infineon Technologies North America Corp., International Business Machines Corporation
    Inventors: Chung-Hsi J. Wu, Timothy Allan Brunner, Shahid Butt, Patrick Speno
  • Publication number: 20040196445
    Abstract: A projected image is formed during a material substrate. A photolithographic mask is illuminated with substantially coherent light at an oblique angle of incidence with respect to a surface of the photolithographic mask. The photolithographic mask includes a substantially transparent mask substrate and one or more lines and spaces patterns formed on the mask substrate and having a periodicity P. The mask substrate includes at least one phase shifting region. At least part of the light that is transmitted through the photolithographic mask is collected using one or more projection lenses which project the portion of the transmitted light onto the material substrate. The material substrate is disposed substantially parallel with, but at a distance from, a focal plane of the projection lens system.
    Type: Application
    Filed: April 4, 2003
    Publication date: October 7, 2004
    Inventors: Gerhard Kunkel, Shahid Butt, Alan Thomas, Juergen Preuninger
  • Publication number: 20040131950
    Abstract: A mask is configured for projecting a structure pattern onto a semiconductor substrate in an exposure unit. The exposure unit has a minimum resolution limit for projecting the structure pattern onto the semiconductor substrate. The mask has a substrate, at least one raised first structure element on the substrate which has a lateral extent which is at least the minimum lateral extent that can be attained by the exposure unit, a configuration second raised structure elements which are arranged in an area surrounding the at least one first structure element on the substrate in the form of a matrix with a row spacing and a column spacing, whose shape and size are essentially identical to one another, and which have a respective lateral extent that is less than the minimum resolution limit of the exposure unit.
    Type: Application
    Filed: September 2, 2003
    Publication date: July 8, 2004
    Inventors: Shahid Butt, Henning Haffner
  • Patent number: 6670646
    Abstract: A mask (118) and method for patterning a semiconductor wafer. The mask (118) includes apertures (122) and assist lines (124) disposed between apertures (122). The assist lines (124) reduce the diffraction effects of the lithographic process, resulting in improved depth of focus and resolution of patterns on a semiconductor wafer.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: December 30, 2003
    Assignee: Infineon Technologies AG
    Inventors: Zhijian Lu, Shahid Butt, Alois Gutmann