Abstract: A system, method, and computer-readable medium to receive, via a user interface, a request to create a valuation for a jet engine asset; retrieve information relevant to the jet engine asset for which the valuation is to be created, the information including at least historical data related to a status of the jet engine asset and current market trends; analyze the retrieved information using heuristics to determine a value of the jet engine asset for at least one asset disposition scenario; store a report of the determined value of the jet engine asset; and display, via the user interface, the report of the determined value of the jet engine asset.

Abstract: An architecture component for use in performing a wavelet transform of a sampled signal, and an architecture including such components are disclosed. The architecture component includes a multiplier, and a multiplexor to multiplex a number n of filter coefficients onto the multiplier. The multiplier processes n consecutive samples with consecutive coefficients, successive multiplier outputs being stored for subsequent processing to generate an output of the filter after every n samples. The wavelet transform may be a discrete wavelet transform or a wavelet packet decomposition. The architecture component may be configured to multiplex two or more coefficients onto a multiplier. Embodiments are disclosed in which the components are derived from a parameterized description in a hardware description language.

Abstract: Architecture and method for performing discrete wavelet transforms An architecture component an a method for use in performing a 2-dimensional discrete wavelet transform of 2-dimensional input data is disclosed. The architecture component comprises a serial processor for receiving the input signal row-by-row, a memory for receiving output coefficients from the serial processor, and a parallel processor for processing coefficients stored in the memory and a serial processor for processing further octaves. The parallel processor is operative to process in parallel coefficients previously derived from one row of input data by the serial processor.

Abstract: An architecture component for use in performing a wavelet transform of a sampled signal, and an architecture including such components are disclosed. The architecture component includes a multiplier, and a multiplexor to multiplex a number n of filter coefficients onto the multiplier. The multiplier processes n consecutive samples with consecutive coefficients, successive multiplier outputs being stored for subsequent processing to generate an output of the filter after every n samples. The wavelet transform may be a discrete wavelet transform or a wavelet packet decomposition. The architecture component may be configured to multiplex two or more coefficients onto a multiplier. Embodiments are disclosed in which the components are derived from a parameterized description in a hardware description language.