Patents by Inventor Shahram Mahdavi

Shahram Mahdavi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Injection locked frequency divider and associated methods
    Patent number: 8410830
    Abstract: An apparatus includes an injection locking frequency divider, which includes a first resonant tank that has a first resonance frequency and a common mode path that includes a second resonant tank, and has a second resonance frequency that is a harmonic of the first resonance frequency. The second resonant tank is adapted to receive a first signal having an oscillation frequency near the harmonic of the first resonance frequency to cause the first resonant tank to provide a second signal that is locked to the first signal.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: April 2, 2013
    Assignee: Silicon Laboratories Inc.
    Inventor: Shahram Mahdavi
  • Injection Locked Frequency Divider And Associated Methods
    Publication number: 20100277207
    Abstract: An apparatus includes an injection locking frequency divider, which includes a first resonant tank that has a first resonance frequency and a common mode path that includes a second resonant tank, and has a second resonance frequency that is a harmonic of the first resonance frequency. The second resonant tank is adapted to receive a first signal having an oscillation frequency near the harmonic of the first resonance frequency to cause the first resonant tank to provide a second signal that is locked to the first signal.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 4, 2010
    Inventor: Shahram Mahdavi
  • Bias voltage circuit with ultra low output impedance
    Patent number: 7135929
    Abstract: A bias voltage circuit with ultra low output impedance. The circuit incorporates feedback to reduce the output impedance at both low and RF frequencies. The bias circuit outputs a bias signal for biasing an amplifier. The bias circuit includes an input stage that receives an input signal and produces the bias signal at an output terminal that is coupled to a gain stage. The bias circuit also includes a load coupled to the input stage at a first terminal, and a feedback circuit coupled between the first terminal and the gain stage.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: November 14, 2006
    Assignee: Sequoia Communications
    Inventors: Damian Costa, Shahram Mahdavi, John Groe