Patents by Inventor Shahriar Pezeshgi

Shahriar Pezeshgi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230333624
    Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.
    Type: Application
    Filed: June 22, 2023
    Publication date: October 19, 2023
    Applicant: ATI Technologies ULC
    Inventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
  • Patent number: 11703931
    Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: July 18, 2023
    Assignee: ATI Technologies ULC
    Inventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
  • Publication number: 20210116987
    Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.
    Type: Application
    Filed: December 24, 2020
    Publication date: April 22, 2021
    Applicant: ATI Technologies ULC
    Inventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
  • Patent number: 10877547
    Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: December 29, 2020
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
  • Patent number: 10649518
    Abstract: A GPU performs dynamic power level management by switching between pre-defined power levels having distinct clock and voltage levels. The dynamic power level management includes identifying a first performance metric associated with processing workloads at the for a consecutive number of measurement cycles. In some embodiments, the consecutive number of measurement cycles includes a current measurement cycle and at least one previous measurement cycle. Based on a determination that the consecutive number of measurement cycles exceeds a minimum hysteresis number, an estimated optimization is determined to be applied to the GPU for a future measurement cycle. A power level setting at the GPU for the future measurement cycle is adjusted based on the estimated optimization. By considering performance metrics including, for example, different processing workloads and hardware configurations, the GPU is able to dynamically adapt its power settings to the particular workload that it is currently processing.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: May 12, 2020
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Soon Kyu Kwon, Jun Huang, Shahriar Pezeshgi, Alexander Sabino Duenas
  • Publication number: 20180210530
    Abstract: A GPU performs dynamic power level management by switching between pre-defined power levels having distinct clock and voltage levels. The dynamic power level management includes identifying a first performance metric associated with processing workloads at the for a consecutive number of measurement cycles. In some embodiments, the consecutive number of measurement cycles includes a current measurement cycle and at least one previous measurement cycle. Based on a determination that the consecutive number of measurement cycles exceeds a minimum hysteresis number, an estimated optimization is determined to be applied to the GPU for a future measurement cycle. A power level setting at the GPU for the future measurement cycle is adjusted based on the estimated optimization. By considering performance metrics including, for example, different processing workloads and hardware configurations, the GPU is able to dynamically adapt its power settings to the particular workload that it is currently processing.
    Type: Application
    Filed: January 26, 2017
    Publication date: July 26, 2018
    Inventors: Soon Kyu KWON, Jun HUANG, Shahriar PEZESHGI, Alexander Sabino DUENAS
  • Publication number: 20180143680
    Abstract: A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.
    Type: Application
    Filed: November 18, 2016
    Publication date: May 24, 2018
    Applicant: ATI Technologies ULC
    Inventors: Shahriar Pezeshgi, Jun Huang, Mohammad Hamed Mousazadeh, Alexander S. Duenas
  • Patent number: 8538741
    Abstract: A method and apparatus that partitions a single display's viewable area into at least two virtual viewable areas, and emulates the at least two virtual viewable areas as at least two emulated physical displays with an operating system such that the operating system behaves as if interfacing with at least two actual independent physical displays. The method provides the operating system with generated display identification data (such as “EDID”) for each of the emulated physical displays in response to a query from the operating system. The method and apparatus also receive notification of an interrupt (where the interrupt corresponds to the single physical display), and reports to the operating system with at least two sets of interrupt reporting information, corresponding to the at least two emulated physical displays, as if two interrupts were received. The operating system is thereby “faked” into acting as if two physical displays are in operation.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: September 17, 2013
    Assignee: ATI Technologies ULC
    Inventors: Yinan Jiang, Shahriar Pezeshgi, Ming-Wei Chien
  • Publication number: 20110144970
    Abstract: A method and apparatus that partitions a single display's viewable area into at least two virtual viewable areas, and emulates the at least two virtual viewable areas as at least two emulated physical displays with an operating system such that the operating system behaves as if interfacing with at least two actual independent physical displays. The method provides the operating system with generated display identification data (such as “EDID”) for each of the emulated physical displays in response to a query from the operating system. The method and apparatus also receive notification of an interrupt (where the interrupt corresponds to the single physical display), and reports to the operating system with at least two sets of interrupt reporting information, corresponding to the at least two emulated physical displays, as if two interrupts were received. The operating system is thereby “faked” into acting as if two physical displays are in operation.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 16, 2011
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: Yinan Jiang, Shahriar Pezeshgi, Ming-Wei Chien