Abstract: Controlling an optical phased array includes applying optical phase shifts by an array of phase shifter (PS) elements, each PS element applying an optical phase shift based on an input voltage signal applied across first and second terminals of the PS element, providing output voltage signals from an array of driver elements. During a charging time period, each driver element provides an output voltage signal to determine a corresponding input voltage signal applied across at least one of the PS elements; an array of switches control connectivity between the driver elements and respective PS elements; and all of the second terminals of all of the PS elements in the array of PS elements are maintained at a common voltage. The total number of switches in the array of switches is at least as large as the total number of PS elements in the array of PS elements.

Abstract: A method and system are provided for aligning signals in a phased array system having multiple tiles. Tile-to-tile signal alignment is achieved through the use of internally-generated local oscillator signals and existing coupling paths between transmit and receive antenna elements in adjacent tiles of the phased array system. The relative phases of the local oscillator signals are measured in both directions between adjacent tiles to determine phase differences that can then be used for alignment of the signals between the adjacent tiles. The self-alignment process can then be repeated on subsequent adjacent tile pairs, thus providing a fully aligned and phase-balanced phased array system. Because there is no need for any external signals or components that are not already resident on the tiles, self-alignment can be performed as part of system startup, e.g., to align the multi-tile phased array before the system is placed into operation in a live network.

Abstract: A method, apparatus, and computer program product provide for dynamically reprogrammable topologically unique integrated circuit identification. In an example embodiment, an integrated circuit may be arranged among multiple integrated circuits. The integrated circuit may be configured to derive a topologically unique identifier by performing input measurements of stimuli provided by a host circuit. The integrated circuit may be topologically indistinguishable from at least one other integrated circuit of the multiple integrated circuits from a perspective of the host circuit.

Abstract: Disclosed is a method and apparatus which use a first automatic gain control unit to receive a first data signal, use a second automatic gain control unit to receive a reflected radar signal, and switches between using the first automatic gain control unit and using the second automatic gain control unit.

Abstract: A method and system are provided for aligning signals in a phased array system having multiple tiles. Tile-to-tile signal alignment is achieved through the use of internally-generated local oscillator signals and existing coupling paths between transmit and receive antenna elements in adjacent tiles of the phased array system. The relative phases of the local oscillator signals are measured in both directions between adjacent tiles to determine phase differences that can then be used for alignment of the signals between the adjacent tiles. The self-alignment process can then be repeated on subsequent adjacent tile pairs, thus providing a fully aligned and phase-balanced phased array system. Because there is no need for any external signals or components that are not already resident on the tiles, self-alignment can be performed as part of system startup, e.g., to align the multi-tile phased array before the system is placed into operation in a live network.

Abstract: Disclosed is a method and apparatus which use a first automatic gain control unit to receive a first data signal, use a second automatic gain control unit to receive a reflected radar signal, and switches between using the first automatic gain control unit and using the second automatic gain control unit.

Abstract: A method, apparatus, and computer program product provide for dynamically reprogrammable topologically unique integrated circuit identification. In an example embodiment, an integrated circuit may be arranged among multiple integrated circuits. The integrated circuit may be configured to derive a topologically unique identifier by performing input measurements of stimuli provided by a host circuit. The integrated circuit may be topologically indistinguishable from at least one other integrated circuit of the multiple integrated circuits from a perspective of the host circuit.

Abstract: In certain embodiments, a two-dimensional antenna block has (at least) two different types of dual-band, dual-polarization patch antennas that support (at least) two different frequency bands in the same polarization direction, where each feed line in the antenna block supports only one frequency band. Quad-band antenna blocks, having three different types of patch antennas supporting three different frequency bands in a first polarization direction and a common frequency band in a second polarization direction, can be tiled to form larger, quad-band antenna arrays. A particular (4×4) antenna block has, in the first polarization direction, eight antennas supporting a first frequency band, four antennas supporting a second frequency band, and four antennas supporting a third frequency band, where all sixteen antennas support the common frequency band. In a PCB implementation, three IC chips are mounted onto the bottom of the PCB to support antenna block communication and/or imaging operations.

Abstract: Controlling an optical phased array includes applying optical phase shifts by an array of phase shifter (PS) elements, each PS element applying an optical phase shift based on an input voltage signal applied across first and second terminals of the PS element, providing output voltage signals from an array of driver elements. During a charging time period, each driver element provides an output voltage signal to determine a corresponding input voltage signal applied across at least one of the PS elements; an array of switches control connectivity between the driver elements and respective PS elements; and all of the second terminals of all of the PS elements in the array of PS elements are maintained at a common voltage. The total number of switches in the array of switches is at least as large as the total number of PS elements in the array of PS elements.

Abstract: In certain embodiments, a two-dimensional antenna block has (at least) two different types of dual-band, dual-polarization patch antennas that support (at least) two different frequency bands in the same polarization direction, where each feed line in the antenna block supports only one frequency band. Quad-band antenna blocks, having three different types of patch antennas supporting three different frequency bands in a first polarization direction and a common frequency band in a second polarization direction, can be tiled to form larger, quad-band antenna arrays. A particular (4×4) antenna block has, in the first polarization direction, eight antennas supporting a first frequency band, four antennas supporting a second frequency band, and four antennas supporting a third frequency band, where all sixteen antennas support the common frequency band. In a PCB implementation, three IC chips are mounted onto the bottom of the PCB to support antenna block communication and/or imaging operations.

Abstract: An apparatus including an optical fiber connector module and an integrated optical device. The optical fiber connection module including an array of holes there-through for holding end segments of optical fibers therein such that the end of each of the optical fibers has a fixed distance relationship with an external surface of the module, the module having one or more electrical conductor lines therein with electrical contacts thereto along the external surface and having one or more first mechanical alignment structures along the external surface. The integrated optical device having one or more second mechanical alignment structures along an outer surface thereof, the first and second mechanical alignment structures capable of being fitted together such that the outer surface and external surface have a fixed relative positional relationship and such that the electrical contacts of the optical fiber connector module are adjacent to electrical contacts of the integrated optical device.

Abstract: Embodiments provide an apparatus, e.g. a wireless data access bridge, that includes two antennas. A first antenna is configured to communicate with a wireless data access point via a first signal at a first radio-frequency (RF) carrier frequency. A second antenna is configured to communicate with a wireless gateway device via a second signal at a second lower RF signal carrier frequency. An interface circuit is configured to recover data from the first signal and to modulate the second signal using the recovered data. In some embodiments the apparatus may operate as a bridge between a microwave-frequency network access point and a residential gateway device in the presence of an attenuating barrier, e.g. a treated window surface.

Abstract: A method and architecture for operating with distributed (or segmented) on-chip digital interfaces such as the Inter-Integrated Circuit protocol and a Serial Peripheral Interface protocol. This method and architecture, illustratively, divides the available address space of the digital interface register arrays of a device into one or more segments referred to as a fundamental digital interface circuit. Such segmentation allows for each fundamental digital interface circuit to be placed in proximity of the digitally controlled circuit(s) (e.g., analog circuit(s)) which share some operational connection and for exchanging communication in accordance with a plurality of inputs to the device.

Abstract: A method and architecture for operating with distributed (or segmented) on-chip digital interfaces such as the Inter-Integrated Circuit protocol and a Serial Peripheral Interface protocol. This method and architecture, illustratively, divides the available address space of the digital interface register arrays of a device into one or more segments referred to as a fundamental digital interface circuit. Such segmentation allows for each fundamental digital interface circuit to be placed in proximity of the digitally controlled circuit(s) (e.g., analog circuit(s)) which share some operational connection and for exchanging communication in accordance with a plurality of inputs to the device.

Abstract: An apparatus includes a 1×2 waveguide-based power divider. The 1×2 waveguide-based power divider includes a 1×2 waveguide coupler, two primary transmission lines, two three-port waveguide couplers, and a series. The series includes one or more secondary transmission lines. Each primary transmission line connects a corresponding output of the 1×2 waveguide coupler to a first port of a corresponding one of the three-port waveguide couplers. The series connects a second ports of the three-port waveguide couplers.

Abstract: An apparatus is disclosed configured for receiving a first alternating signal and for transmitting a second alternating signal. A detector is configured to receive a third alternating signal which is a reflection of at least a portion in power of the second alternating signal. The detector is further configured to convert the third alternating signal into a rectified signal and measure the power of said rectified signal. The measured power of the rectified signal is indicative of a power of the reflected third signal.

Abstract: An apparatus is disclosed configured for receiving a first alternating signal and for transmitting a second alternating signal. A detector is configured to receive a third alternating signal which is a reflection of at least a portion in power of the second alternating signal. The detector is further configured to convert the third alternating signal into a rectified signal and measure the power of said rectified signal. The measured power of the rectified signal is indicative of a power of the reflected third signal.

Abstract: An apparatus includes a 1x2 waveguide-based power divider. The 1x2 waveguide-based power divider includes a 1x2 waveguide coupler, two primary transmission lines, two three-port waveguide couplers, and a series. The series includes one or more secondary transmission lines. Each primary transmission line connects a corresponding output of the 1x2 waveguide coupler to a first port of a corresponding one of the three-port waveguide couplers. The series connects a second ports of the three-port waveguide couplers.

Abstract: An apparatus includes a dielectric slab having first and opposing second major surfaces. A planar antenna element is located on the first major surface. A via formed through the dielectric slab is conductively connected to the antenna element. A plurality of solder bump pads is located on the second major surface and is configured to attach the dielectric slab to an integrated circuit.

Abstract: We disclose an opto-electronic circuit having an optical modulator and a driver circuit configured to generate a plurality of electrical drive signals for the optical modulator in a manner that causes the opto-electronic circuit to operate as a finite-impulse-response (FIR) filter. Different electrical drive signals generated by the driver circuit represent different taps of the FIR filter and are individually applied to different respective electrodes in the optical modulator without first being combined with one another prior to said individual application. The optical modulator represents an adder of the FIR filter and is configured to use the applied electrical drive signals to perform signal summation in the optical domain, thereby alleviating some of the limitations associated with the electrical RF circuitry used in the driver circuit.