Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor, display text plane information, control plane data, and a table of memory addresses. One peripheral connects to the ultrasound apparatus.

Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor display text plane information, control plane data and a table of memory addresses. One peripheral connects to the ultrasound apparatus.

Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor, display text plane information, control plane data, and a table of memory addresses. One peripheral connects to the ultrasound apparatus.

Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor, display text plane information, control plane data, and a table of memory addresses. One peripheral connects to the ultrasound apparatus.

Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor, display text plane information, control plane data, and a table of memory addresses. One peripheral connects to the ultrasound apparatus.

Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor, display text plane information, control plane data, and a table of memory addresses. One peripheral connects to the ultrasound apparatus.

Abstract: An apparatus and method for processing ultrasound data is provided. The apparatus includes an interface operatively connected to a memory, a programmable single instruction multiple data processor (or two symmetric processors), a source of acoustic data (such as a data bus) and a system bus. The memory stores data from the processor, ultrasound data from the source, and data from the system bus. The processor has direct access to the memory. Alternatively, the system bus has direct access to the memory. The interface device translates logically addressed ultrasound data to physically addressed ultrasound data for storage in a memory. The translation is the same for data from both the processor and the source for at least a portion of a range of addresses. The memory stores both ultrasound data and various of: beamformer control data, instruction data for the processor, display text plane information, control plane data, and a table of memory addresses. One peripheral connects to the ultrasound apparatus.