Abstract: A technique for improving the performance of binary tree operations involves defining an implicit binary tree structure in a memory array, and clustering of the nodes of the tree in memory in a cache-aware manner. The technique reduces memory latency by improved spatial locality of the binary tree data, and further improves cache performance through reduced size of the data objects resulting from elimination of pointers to other nodes of the tree.

Abstract: A method for functional verification of a design for a parallel processing device includes receiving a sequence of single instructions from a dynamic test program generator, and assembling a plurality of the instructions from the sequence into an instruction word, in accordance with predetermined rules applicable to the parallel processing device. The instruction word is input to a simulator of the parallel processing device so as to determine a response of the device to the instruction word.

Abstract: An elcctrobiochemical system for the determination of the presence and optionally concentration of an analyte in a liquid medium, the system comprising an electrode having immobilized thereon a member of a recognition pair, the other member of said pair being said analyte, the presence of said analyte in the medium resulting in formation of a pair complex, being a complex between said immobilized member and said analyte; the system further comprising redox molecules capable of changing their redox state by accepting electrons from or donating electrons to the electrode; the formation of the pair complex on the electrode bringing a change in the electrical response of the system, whereby the presence and optionally the concentration of said analyte in the medium can be determined.