Patents by Inventor Shai-Chang Huang

Shai-Chang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SOI MOSFET device with reduced polysilicon loading on active area
    Publication number: 20060175661
    Abstract: Silicon-on-insulator (SOI) devices with reduced polysilicon loading on an active area uses at least one dielectric layer resistant to silicidation to separate at least one body contact region from source/drain regions, thus reducing gate capacitance and improving device performance. The SOI devices may be used in full depletion type transistors or partial depletion type transistors.
    Type: Application
    Filed: February 8, 2005
    Publication date: August 10, 2006
    Inventor: Shai-Chang Huang