Patents by Inventor Shailendra Aulakh

Shailendra Aulakh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10169232
    Abstract: In response to a cacheable write request from a host, physical cache locations are allocated from a free list, and the data blocks are written to those cache locations without regard to whether any read requests to the corresponding logical addresses are pending. After the data has been written, and again without regard to whether any read requests are pending against the corresponding logical addresses, metadata is updated to associate the cache locations with the logical addresses. A count of data access requests pending against each cache location having valid data is maintained, and a cache location is only returned to the free list when the count indicates no data access requests are pending against the cache location.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: January 1, 2019
    Assignee: Seagate Technology LLC
    Inventors: Horia Cristian Simionescu, Balakrishnan Sundararaman, Shashank Nemawarkar, Larry Stephen King, Mark Ish, Shailendra Aulakh
  • Publication number: 20170242794
    Abstract: In response to a cacheable write request from a host, physical cache locations are allocated from a free list, and the data blocks are written to those cache locations without regard to whether any read requests to the corresponding logical addresses are pending. After the data has been written, and again without regard to whether any read requests are pending against the corresponding logical addresses, metadata is updated to associate the cache locations with the logical addresses. A count of data access requests pending against each cache location having valid data is maintained, and a cache location is only returned to the free list when the count indicates no data access requests are pending against the cache location.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 24, 2017
    Inventors: Horia Cristian Simionescu, Balakrishnan Sundararaman, Shashank Nemawarkar, Larry Stephen King, Mark Ish, Shailendra Aulakh
  • Patent number: 8917738
    Abstract: Described embodiments provide a method of processing packets of a network processor. One or more tasks are generated corresponding to received packets associated with one or more data flows. A traffic manager receives a task corresponding to a data flow, the task provided by a processing module of the network processor. The traffic manager determines whether the received task corresponds to a unicast data flow or a multicast data flow. If the received task corresponds to a multicast data flow, the traffic manager determines, based on identifiers corresponding to the task, an address of launch data stored in launch data tables in a shared memory, and reads the launch data. Based on the identifiers and the read launch data, two or more output tasks are generated corresponding to the multicast data flow, and the two or more output tasks are added at the tail end of a scheduling queue.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: December 23, 2014
    Assignee: LSI Corporation
    Inventors: Balakrishnan Sundararaman, Shailendra Aulakh, David P. Sonnier, Rachel Flood
  • Patent number: 8869156
    Abstract: Described embodiments provide for scheduling packets for transmission by a network processor. The network processor generates tasks corresponding to received packets associated with a data flow. A traffic manager of the network processor receives tasks provided by a processing module of the network processor and generates a tree scheduling hierarchy having one or more scheduling levels. Each received task is queued in a queue of the scheduling hierarchy associated with the received task, the queue having a corresponding parent scheduler in each level of the scheduling hierarchy, forming a branch of the scheduling hierarchy. A parent scheduler selects a child node to transmit a task. A task read module determines a thread corresponding to the selected child node to read corresponding packet data from a shared memory. The traffic manager forms one or more output tasks for transmission based on the packet data corresponding to the thread.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 21, 2014
    Assignee: LSI Corporation
    Inventors: Shailendra Aulakh, Balakrishnan Sundararaman, Shashank Nemawarkar
  • Patent number: 8869151
    Abstract: Described embodiments provide for controlling a state of each node in a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. A traffic manager enqueues received tasks in a queue of the scheduling hierarchy associated with a data flow. The traffic manager maintains scheduling data structures for each node in the scheduling hierarchy. The scheduling data structures include a backpressure indicator and a timer indicator. If the backpressure indicator is set, the traffic manager sets the node as unavailable for scheduling and removes the node from the scheduling hierarchy. If the timer indicator is set, the traffic managers sets the node as unavailable for scheduling. Otherwise, if neither the backpressure indicator nor the timer indicator is set, the traffic manager sets the node as available for scheduling.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 21, 2014
    Assignee: LSI Corporation
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, David Sonnier, Shailendra Aulakh
  • Patent number: 8848723
    Abstract: Described embodiments provide for dynamically constructing a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. The traffic manager queues the received task in the associated queue, the queue having a corresponding parent scheduler at each of one or more next levels of the scheduling hierarchy up to the root scheduler. A parent scheduler selects, starting at the root scheduler and iteratively repeating at each of the corresponding N scheduling levels until a queue is selected, a child node to transmit at least one task. The traffic manager forms output packets for transmission based on the at least one task from the selected queue.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 30, 2014
    Assignee: LSI Corporation
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, David Sonnier, Shailendra Aulakh
  • Patent number: 8837501
    Abstract: Described embodiments provide sharing data between nodes in a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets, each task having a shared parameter ID. The traffic manager determines the shared parameter ID value of the received task and queues the received task in a queue of the scheduling hierarchy. The queue has a scheduler level M and a parent scheduler at each of M?1 levels in the scheduling hierarchy. The traffic manager determines a shared parameter ID value of the queue. The traffic manager loads, from a shared memory to a corresponding level one cache, one or more shared parameter values corresponding to at least one of the determined shared parameter ID value of the received task and the determined shared parameter ID value of the queue.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 16, 2014
    Assignee: LSI Corporation
    Inventors: Balakrishnan Sundararaman, Shailendra Aulakh, David Sonnier, Shashank Nemawarkar
  • Patent number: 8638805
    Abstract: Described embodiments provide for restructuring a scheduling hierarchy of a network processor having a plurality of processing modules and a shared memory. The scheduling hierarchy schedules packets for transmission. The network processor generates tasks corresponding to each received packet associated with a data flow. A traffic manager receives tasks provided by one of the processing modules and determines a queue of the scheduling hierarchy corresponding to the task. The queue has a parent scheduler at each of one or more next levels of the scheduling hierarchy up to a root scheduler, forming a branch of the hierarchy. The traffic manager determines if the queue and one or more of the parent schedulers of the branch should be restructured. If so, the traffic manager drops subsequently received tasks for the branch, drains all tasks of the branch, and removes the corresponding nodes of the branch from the scheduling hierarchy.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: January 28, 2014
    Assignee: LSI Corporation
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, David Sonnier, Shailendra Aulakh, Allen Vestal
  • Patent number: 8547878
    Abstract: Described embodiments provide for scheduling packets for transmission by a network processor. A traffic manager generates a scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. A finite state machine (FSM) enqueues the received task in the associated queue. The queue has a corresponding scheduler level M, with a corresponding parent scheduler at each of M?1 levels in the scheduling hierarchy, where M is a positive integer less than or equal to N. Nodes at each of the N scheduling levels send messages only with one node at a relative next higher level and with one or more nodes at a relative next lower level. Each node in the scheduling hierarchy updates corresponding statistics and control indicators based on messages received from the node at the next higher level and the one or more nodes at the next lower level.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 1, 2013
    Assignee: LSI Corporation
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, Shailendra Aulakh
  • Patent number: 8407707
    Abstract: Described embodiments provide a method of assigning tasks to queues of a processing core. Tasks are assigned to a queue by sending, by a source processing core, a new task having a task identifier. A destination processing core receives the new task and determines whether another task having the same identifier exists in any of the queues corresponding to the destination processing core. If another task with the same identifier as the new task exists, the destination processing core assigns the new task to the queue containing a task with the same identifier as the new task. If no task with the same identifier as the new task exists in the queues, the destination processing core assigns the new task to the queue having the fewest tasks. The source processing core writes the new task to the assigned queue. The destination processing core executes the tasks in its queues.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: March 26, 2013
    Assignee: LSI Corporation
    Inventors: David P. Sonnier, Balakrishnan Sundararaman, Shailendra Aulakh, Deepak Mital
  • Publication number: 20120020369
    Abstract: Described embodiments provide for dynamically constructing a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. The traffic manager queues the received task in the associated queue, the queue having a corresponding parent scheduler at each of one or more next levels of the scheduling hierarchy up to the root scheduler. A parent scheduler selects, starting at the root scheduler and iteratively repeating at each of the corresponding N scheduling levels until a queue is selected, a child node to transmit at least one task. The traffic manager forms output packets for transmission based on the at least one task from the selected queue.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, David Sonnier, Shailendra Aulakh
  • Publication number: 20120020249
    Abstract: Described embodiments provide for controlling a state of each node in a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. A traffic manager enqueues received tasks in a queue of the scheduling hierarchy associated with a data flow. The traffic manager maintains scheduling data structures for each node in the scheduling hierarchy. The scheduling data structures include a backpressure indicator and a timer indicator. If the backpressure indicator is set, the traffic manager sets the node as unavailable for scheduling and removes the node from the scheduling hierarchy. If the timer indicator is set, the traffic managers sets the node as unavailable for scheduling. Otherwise, if neither the backpressure indicator nor the timer indicator is set, the traffic manager sets the node as available for scheduling.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, David Sonnier, Shailendra Aulakh
  • Publication number: 20120020251
    Abstract: Described embodiments provide for scheduling packets for transmission by a network processor. A traffic manager generates a scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets. A finite state machine (FSM) enqueues the received task in the associated queue. The queue has a corresponding scheduler level M, with a corresponding parent scheduler at each of M?1 levels in the scheduling hierarchy, where M is a positive integer less than or equal to N. Nodes at each of the N scheduling levels send messages only with one node at a relative next higher level and with one or more nodes at a relative next lower level. Each node in the scheduling hierarchy updates corresponding statistics and control indicators based on messages received from the node at the next higher level and the one or more nodes at the next lower level.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, Shailendra Aulakh
  • Publication number: 20120020366
    Abstract: Described embodiments provide for restructuring a scheduling hierarchy of a network processor having a plurality of processing modules and a shared memory. The scheduling hierarchy schedules packets for transmission. The network processor generates tasks corresponding to each received packet associated with a data flow. A traffic manager receives tasks provided by one of the processing modules and determines a queue of the scheduling hierarchy corresponding to the task. The queue has a parent scheduler at each of one or more next levels of the scheduling hierarchy up to a root scheduler, forming a branch of the hierarchy. The traffic manager determines if the queue and one or more of the parent schedulers of the branch should be restructured. If so, the traffic manager drops subsequently received tasks for the branch, drains all tasks of the branch, and removes the corresponding nodes of the branch from the scheduling hierarchy.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Inventors: Balakrishnan Sundararaman, Shashank Nemawarkar, David Sonnier, Shailendra Aulakh, Allen Vestal
  • Publication number: 20120020250
    Abstract: Described embodiments provide sharing data between nodes in a scheduling hierarchy of a network processor. A traffic manager generates a tree scheduling hierarchy having a root scheduler and N scheduler levels. The network processor generates tasks corresponding to received packets, each task having a shared parameter ID. The traffic manager determines the shared parameter ID value of the received task and queues the received task in a queue of the scheduling hierarchy. The queue has a scheduler level M and a parent scheduler at each of M-1 levels in the scheduling hierarchy. The traffic manager determines a shared parameter ID value of the queue. The traffic manager loads, from a shared memory to a corresponding level one cache, one or more shared parameter values corresponding to at least one of the determined shared parameter ID value of the received task and the determined shared parameter ID value of the queue.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Inventors: Balakrishnan Sundararaman, Shailendra Aulakh, David Sonnier, Shashank Nemawarkar
  • Publication number: 20120020367
    Abstract: Described embodiments provide for scheduling packets for transmission by a network processor. The network processor generates tasks corresponding to received packets associated with a data flow. A traffic manager of the network processor receives tasks provided by a processing module of the network processor and generates a tree scheduling hierarchy having one or more scheduling levels. Each received task is queued in a queue of the scheduling hierarchy associated with the received task, the queue having a corresponding parent scheduler in each level of the scheduling hierarchy, forming a branch of the scheduling hierarchy. A parent scheduler selects a child node to transmit a task. A task read module determines a thread corresponding to the selected child node to read corresponding packet data from a shared memory. The traffic manager forms one or more output tasks for transmission based on the packet data corresponding to the thread.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Inventors: Shailendra Aulakh, Balakrishnan Sundararaman, Shashank Nemawarkar
  • Publication number: 20120002546
    Abstract: Described embodiments provide a method of processing packets of a network processor. One or more tasks are generated corresponding to received packets associated with one or more data flows. A traffic manager receives a task corresponding to a data flow, the task provided by a processing module of the network processor. The traffic manager determines whether the received task corresponds to a unicast data flow or a multicast data flow. If the received task corresponds to a multicast data flow, the traffic manager determines, based on identifiers corresponding to the task, an address of launch data stored in launch data tables in a shared memory, and reads the launch data. Based on the identifiers and the read launch data, two or more output tasks are generated corresponding to the multicast data flow, and the two or more output tasks are added at the tail end of a scheduling queue.
    Type: Application
    Filed: September 14, 2011
    Publication date: January 5, 2012
    Inventors: Balakrishnan Sundararaman, Shailendra Aulakh, David P. Sonnier, Rachel Flood
  • Publication number: 20100293353
    Abstract: Described embodiments provide a method of assigning tasks to queues of a processing core. Tasks are assigned to a queue by sending, by a source processing core, a new task having a task identifier. A destination processing core receives the new task and determines whether another task having the same identifier exists in any of the queues corresponding to the destination processing core. If another task with the same identifier as the new task exists, the destination processing core assigns the new task to the queue containing a task with the same identifier as the new task. If no task with the same identifier as the new task exists in the queues, the destination processing core assigns the new task to the queue having the fewest tasks. The source processing core writes the new task to the assigned queue. The destination processing core executes the tasks in its queues.
    Type: Application
    Filed: May 18, 2010
    Publication date: November 18, 2010
    Inventors: David P. Sonnier, Balakrishnan Sundararaman, Shailendra Aulakh, Deepak Mital