Patents by Inventor Shailesh R. Gami

Shailesh R. Gami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9595193
    Abstract: A computer-implemented method and system for vehicular traffic control and vehicle routing includes receiving a request for a best route, at a central system. The request including a current location and a destination from a requesting vehicle. Travel factors from the current location to the destination are determined. The travel factors include road availability, traffic conditions, and real time feedback, using the central system in response to receiving the request. The best route is determined for the requesting vehicle from the current location to the destination based on the travel factors, and real time feedback of the traffic conditions. The method and system includes initiating a plurality of traffic control actions along the route for the requesting vehicle. The traffic control actions are initiated along the route simultaneously and in concert with the requesting vehicle to clear the best route for the requesting vehicle to travel unobstructed to the destination.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: March 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ali Y. Duale, Shailesh R. Gami, Louis P. Gomes, Rajaram B. Krishnamurthy
  • Patent number: 9514017
    Abstract: Compare points are detected in a multi-threaded computing environment. One thread of the multi-threaded computing environment has reached a compare point for the one thread. The compare point for the one thread being a point at which results of executing a test case on the one thread is ready to be compared against expected results for that test case. A determination is made as to whether another thread of the multi-threaded computing environment has reached a compare point for the another thread. Execution of the another thread is continued, based on determining the another thread has not reached the compare point for the another thread. The test case of the one thread is, however, not re-executed.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis Wittig
  • Patent number: 9513956
    Abstract: Compare points are detected in a multi-threaded computing environment. One thread of the multi-threaded computing environment has reached a compare point for the one thread. The compare point for the one thread being a point at which results of executing a test case on the one thread is ready to be compared against expected results for that test case. A determination is made as to whether another thread of the multi-threaded computing environment has reached a compare point for the another thread. Execution of the another thread is continued, based on determining the another thread has not reached the compare point for the another thread. The test case of the one thread is, however, not re-executed.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis Wittig
  • Publication number: 20160232005
    Abstract: A testing facility is provided to test the multithreading functionality of a computing environment. The testing of this functionality includes building independent instruction streams to test threads of a multi-threaded environment while honoring architecturally imposed common fields and constraints, if any, of the threads. Certain features may be enabled/disabled for all threads. The instruction streams generated for testing this functionality may vary from being identical for all the threads being tested to being totally different, such as having different architectures.
    Type: Application
    Filed: February 10, 2015
    Publication date: August 11, 2016
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis Wittig
  • Publication number: 20160232029
    Abstract: Compare points are detected in a multi-threaded computing environment. One thread of the multi-threaded computing environment has reached a compare point for the one thread. The compare point for the one thread being a point at which results of executing a test case on the one thread is ready to be compared against expected results for that test case. A determination is made as to whether another thread of the multi-threaded computing environment has reached a compare point for the another thread. Execution of the another thread is continued, based on determining the another thread has not reached the compare point for the another thread. The test case of the one thread is, however, not re-executed.
    Type: Application
    Filed: February 10, 2015
    Publication date: August 11, 2016
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis Wittig
  • Publication number: 20160232071
    Abstract: A testing facility is provided to test the multithreading functionality of a computing environment. The testing of this functionality includes building independent instruction streams to test threads of a multi-threaded environment while honoring architecturally imposed common fields and constraints, if any, of the threads. Certain features may be enabled/disabled for all threads. The instruction streams generated for testing this functionality may vary from being identical for all the threads being tested to being totally different, such as having different architectures.
    Type: Application
    Filed: September 29, 2015
    Publication date: August 11, 2016
    Inventors: Ali Y Duale, Shailesh R. Gami, Dennis Wittig
  • Publication number: 20160232068
    Abstract: Compare points are detected in a multi-threaded computing environment. One thread of the multi-threaded computing environment has reached a compare point for the one thread. The compare point for the one thread being a point at which results of executing a test case on the one thread is ready to be compared against expected results for that test case. A determination is made as to whether another thread of the multi-threaded computing environment has reached a compare point for the another thread. Execution of the another thread is continued, based on determining the another thread has not reached the compare point for the another thread. The test case of the one thread is, however, not re-executed.
    Type: Application
    Filed: September 29, 2015
    Publication date: August 11, 2016
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis Wittig
  • Patent number: 9218272
    Abstract: Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution, testing, by the computing device, the transaction execution in a uni-processing system based on the instruction stream, and outputting, by the computing device, a status of the test to one or more output devices. A determination may be made that an abort occurs in the transaction execution based on the testing.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: December 22, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis W. Wittig
  • Patent number: 9111034
    Abstract: A computer program product is provided for performing a method including: generating a test instruction stream of a program that includes a plurality of executable instructions; setting controls for a runtime-instrumentation process; simulating execution of the test instruction stream and sampling of the test instruction stream according to the controls, and storing simulated records associated with the sampling in a predicted collection buffer (PCB); accessing a program buffer of a processor, the program buffer storing records associated with sampling the test instruction stream according to the controls during execution of the test instruction stream by the processor; examining individual records in the program buffer to determine whether the individual records are valid and in proper sequence; and comparing the simulated records of the PCB and the records of the program buffer to validate the program buffer.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: August 18, 2015
    Assignee: International Business Machines Corporation
    Inventors: Ali Y. Duale, Shailesh R. Gami, Sandhya Venugopala, Dennis Wittig
  • Publication number: 20140250330
    Abstract: Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution, testing, by the computing device, the transaction execution in a uni-processing system based on the instruction stream, and outputting, by the computing device, a status of the test to one or more output devices. A determination may be made that an abort occurs in the transaction execution based on the testing.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis W. Wittig
  • Publication number: 20140245074
    Abstract: A computer program product is provided for performing a method including: generating a test instruction stream of a program that includes a plurality of executable instructions; setting controls for a runtime-instrumentation process; simulating execution of the test instruction stream and sampling of the test instruction stream according to the controls, and storing simulated records associated with the sampling in a predicted collection buffer (PCB); accessing a program buffer of a processor, the program buffer storing records associated with sampling the test instruction stream according to the controls during execution of the test instruction stream by the processor; examining individual records in the program buffer to determine whether the individual records are valid and in proper sequence; and comparing the simulated records of the PCB and the records of the program buffer to validate the program buffer.
    Type: Application
    Filed: February 27, 2013
    Publication date: August 28, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Y. Duale, Shailesh R. Gami, Sandhya Venugopala, Dennis Wittig
  • Patent number: 8479172
    Abstract: A system for testing a base machine includes the base machine that has a base feature set (BFS) and a testing module. The system also includes a test case generator, configured to: select a prior level of the base machine, the prior level having a legacy architecture; determine a feature set of the legacy architecture based on the BFS; generate a set of test instructions based on the feature set; and provide the set of test instructions to the testing module.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis W. Wittig
  • Publication number: 20120131560
    Abstract: A system for testing a base machine includes the base machine that has a base feature set (BFS) and a testing module. The system also includes a test case generator, configured to: select a prior level of the base machine, the prior level having a legacy architecture; determine a feature set of the legacy architecture based on the BFS; generate a set of test instructions based on the feature set; and provide the set of test instructions to the testing module.
    Type: Application
    Filed: November 23, 2010
    Publication date: May 24, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ali Y. Duale, Shailesh R. Gami, Dennis W. Wittig