Patents by Inventor Shailja Garg

Shailja Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9122288
    Abstract: USB physical interface subsystems are provided that include a protection circuit including a power supply interface and a plurality of pin interfaces, a pin identifier circuit in communication with the protection circuit for detecting a device coupling to a pin connected to one pin interface of the plurality of pin interfaces, a USB physical interface, and a dual power supply regulator configured to receive power via the power supply interface, to continuously supply a first voltage to the protection circuit, and to provide a second voltage and a third voltage to the pin identifier circuit and the USB physical interface, the second voltage and the third voltage being switched outputs.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: September 1, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: Anup Nayak, Nicholas Bodnaruk, Derwin Mattos, Shailja Garg
  • Patent number: 7863971
    Abstract: A configurable power controller and method for controlling power of a macro circuit block, such as a memory circuit, in multiple power modes is described to help minimize power consumption of the macro circuit block when the application environment for the macro circuit block is in a lower power mode than during its normal power mode.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: January 4, 2011
    Assignee: Cypress Semiconductor Corporation
    Inventors: Anup Nayak, Sanjay Kumar Sancheti, Shailja Garg