Abstract: User process to directly access a file in a file system. A user process first opens a file in the file system for access. In the process of opening the file, a file handle for the file is returned to the user process by an operating system kernel. The user process then makes a read request to a special function unit for one or more blocks of the file in the file system using the file handle. In response, the special function unit, which is coupled to the processor, bypasses the operating system kernel and returns the requested data directly to the user process. A write by the user process may be refused by the computer system or allowed on a selective basis based on a flag in a file system inode corresponding to the block.

Abstract: Disclosed aspects relate to address space management with respect to a Coherent Accelerator Processor Interface (CAPI) architecture. A shared CAPI component may be established to access a plurality of address spaces of a plurality of assets. The plurality of assets may include both a first asset which corresponds to a first address space of the plurality of address spaces and a second asset which corresponds to a second address space of the plurality of address spaces. A request may be detected to process a set of data and route a set of processed data from the first asset to the second asset. The set of data may be processed to form the set of processed data. The set of processed data may be routed from the first address space to the second address space to fulfill the request.

Abstract: Disclosed aspects relate to address space management with respect to a Coherent Accelerator Processor Interface (CAPI) architecture. A shared CAPI component may be established to access a plurality of address spaces of a plurality of assets. The plurality of assets may include both a first asset which corresponds to a first address space of the plurality of address spaces and a second asset which corresponds to a second address space of the plurality of address spaces. A request may be detected to process a set of data and route a set of processed data from the first asset to the second asset. The set of data may be processed to form the set of processed data. The set of processed data may be routed from the first address space to the second address space to fulfill the request.

Abstract: Mechanisms are provided, in a data processing system having a processor and a cache subsystem, for providing software controlled cache segmentation and cache segment utilization. The mechanisms segment a cache memory of the cache subsystem such that the cache memory comprises a plurality of cache segments. Each cache segment in the plurality of cache segments is associated with a different data property of data stored in the cache segment. The mechanisms configure software executing on the data processing system to direct cache accesses to one of the cache segments based on a corresponding data property of the cache accesses by the software. The mechanisms process, by the processor, a data access operation from software executing on the processor, based on an identifier of a cache segment in one of an effective address provided by the software or a page table entry corresponding to the effective address provided by the software.

Abstract: Mechanisms are provided, in a data processing system having a processor and a cache subsystem, for providing software controlled cache segmentation and cache segment utilization. The mechanisms segment a cache memory of the cache subsystem such that the cache memory comprises a plurality of cache segments. Each cache segment in the plurality of cache segments is associated with a different data property of data stored in the cache segment. The mechanisms configure software executing on the data processing system to direct cache accesses to one of the cache segments based on a corresponding data property of the cache accesses by the software. The mechanisms process, by the processor, a data access operation from software executing on the processor, based on an identifier of a cache segment in one of an effective address provided by the software or a page table entry corresponding to the effective address provided by the software.

Abstract: Disclosed aspects relate to address space management with respect to a Coherent Accelerator Processor Interface (CAPI) architecture. A shared CAPI component may be established to access a plurality of address spaces of a plurality of assets. The plurality of assets may include both a first asset which corresponds to a first address space of the plurality of address spaces and a second asset which corresponds to a second address space of the plurality of address spaces. A request may be detected to process a set of data and route a set of processed data from the first asset to the second asset. The set of data may be processed to form the set of processed data. The set of processed data may be routed from the first address space to the second address space to fulfill the request.

Abstract: Disclosed aspects relate to address space management with respect to a Coherent Accelerator Processor Interface (CAPI) architecture. A shared CAPI component may be established to access a plurality of address spaces of a plurality of assets. The plurality of assets may include both a first asset which corresponds to a first address space of the plurality of address spaces and a second asset which corresponds to a second address space of the plurality of address spaces. A request may be detected to process a set of data and route a set of processed data from the first asset to the second asset. The set of data may be processed to form the set of processed data. The set of processed data may be routed from the first address space to the second address space to fulfill the request.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: Embodiments of the present invention provide a system and method for a dynamic tracing framework for debugging in a virtualized environment. Embodiment of the present invention can include selecting a home node and a set of remote nodes to which apply a set of probes. Data collection is performed by a tracing agent of each node and the collection of data is shared across multiple software systems.

Abstract: A computer-implemented method for lock-free use of a non-preemptive system resource by a preemptive thread, which may be interrupted. The method comprises registering a non-preemptive system resource and a first level reclaim handler for the non-preemptive system resource with the kernel of an operating system, registering a second level reclaim handler with the kernel, wherein the second level reclaim handler is included in an application program, and running the application program as a preemptive thread using the non-preemptive system resource. The first level reclaim handler is code that is a part of the implementation of the non-preemptive system resource in the kernel. The second level reclaim handler is code that is part of the application and is registered with the kernel before the application uses the non-preemptive system resource. The method enables a preemptive thread using a non-preemptive system resource to be preempted without crashing.

Abstract: Techniques are disclosed for providing thread specific protection levels in a multithreaded processing environment. An associated method includes generating a group of threads in a process, one of the group of threads opening a thread entity, and that one of the group of threads specifying one or more levels of access to the thread entity for the other threads. In one embodiment, when a first of the threads attempts to perform a specified operation on the thread entity, the method includes determining whether that first thread is the one of the group of threads that opened the thread entity. When the first thread is not that one of the group of threads, the first thread is allowed to perform the specified operation if and only if such operation is permitted by the specified one or more levels of access.

Abstract: Techniques are disclosed for providing thread specific protection levels in a multithreaded processing environment. An associated method includes generating a group of threads in a process, one of the group of threads opening a thread entity, and that one of the group of threads specifying one or more levels of access to the thread entity for the other threads. In one embodiment, when a first of the threads attempts to perform a specified operation on the thread entity, the method of this invention determines whether that first thread is the one of the group of threads that opened the thread entity. When the first thread is not that one of the group of threads, the first thread is allowed to perform the specified operation if and only if such operation is permitted by the specified one or more levels of access.

Abstract: An apparatus for monitoring changes to a block of data is disclosed. A first hardware watchpoint is set to monitor changes to the block of data at a current location of the block of data in memory and a second hardware watchpoint is set to monitor changes at a selected location in the memory where a reference to the block of data is located. Responsive to the second hardware watchpoint being triggered by a change at the selected location where the reference to the block of data is located, a new location of the block of data in the memory is identified based on the change that triggered the second hardware watchpoint. Subsequent to identifying the new location of the block of data, the first hardware watchpoint is reset to monitor changes to the block of data at the new location of the block of data.

Abstract: A method and apparatus for monitoring changes to a block of data is disclosed. A computer sets a first hardware watchpoint to monitor changes to the block of data at a current location of the block of data in memory and a second hardware watchpoint to monitor changes at a selected location in the memory where a reference to the block of data is located. Responsive to the second hardware watchpoint being triggered by a change at the selected location where the reference to the block of data is located, the computer identifies a new location of the block of data in the memory based on the change that triggered the second hardware watchpoint. Subsequent to identifying the new location of the block of data, the computer then resets the first hardware watchpoint to monitor changes to the block of data at the new location of the block of data.

Abstract: An approach to providing multiple concurrently executing debugging sessions for a currently executing operating system. The approach involves providing one first debugging session for debugging the currently executing operating system. The first debugging session has read access and write access to the data of the currently executing operating system. The approach also involves providing one or more second debugging sessions for the currently executing operating system. Each of the second debugging sessions has read-only access to the data of the currently executing operating system. The second debugging sessions run simultaneously with the first debugging session if the second debugging sessions are started while the first debugging session is active. As a result, multiple users can simultaneously debug the currently executing operating system. A lock may be used to ensure that only the first debugging session has write access to the data.