Abstract: A vapor chamber heatsink assembly, under vacuum, having a working fluid therein, comprising a plurality of heatsink fins and a vapor chamber is provided. The vapor chamber and the plurality of heatsink fins each comprise a plurality of obstructers defining a plurality of braided channels therein. Thus, the condenser regions of the vapor chamber are expanded to the plurality of heatsink fins. When heat from a greater temperature heat source and a lower temperature heat source is applied to the vapor chamber, via the plurality of obstructers and braided channels, the working fluid and liquid vapor travel therethrough, providing an effective phase change mechanism to the greater temperature heat source, while concurrently, hindering agglomeration of working fluid thereto. An effective phase change mechanism is also concurrently provided to the lower temperature heat source due to the non-agglomeration of working fluid to the greater temperature heat source.

Abstract: A torsion balance is provided which includes a twisting wire and a reflector. The twisting wire is a suspended carbon nanotube. The reflector is hung on the twisting wire. The reflector further includes a film, a first reflecting layer, and a second reflecting layer; and the film includes a first surface and a second surface opposite to the first surface, and the first reflecting layer is located on the first surface and the second reflecting layer is located on the second surface.

Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, a carbon nanotube structure, a source electrode and a drain electrode. The gate insulating layer is located on the gate electrode. The carbon nanotube structure is located on the gate insulating layer. The source electrode and the drain electrode are arranged at intervals and electrically connected to the carbon nanotube structure respectively. The thin film transistor further includes an interface charge layer, and the interface charge layer is located between the carbon nanotube structure and the gate insulating layer.

Abstract: A graphene heating chip includes a substrate, an insulating layer, a graphene film, and a plurality of electrodes. The substrate has two opposite a first surface and a second surface, and the substrate defines a through hole. The insulating layer is suspended on the substrate. The insulating layer covering the through hole and not in direct contact with the first surface is defined as a window, and a plurality of grooves are formed on the window. The graphene film covers the window, and the graphene film includes a first graphene film portion and a second graphene film portion, and the first graphene film portion and the second graphene film portion are spaced apart from each other. The plurality of electrodes are located on the surface of the insulating layer away from the substrate. The present application also provides a method for calibrating a temperature of the graphene heating chip.

Abstract: A graphene heating chip includes a substrate, an insulating layer, a graphene film, and a plurality of electrodes. The substrate has two opposite a first surface and a second surface, and the substrate defines a through hole. The insulating layer is suspended on the substrate. The insulating layer covering the through hole and not in direct contact with the first surface is defined as a window, and a plurality of grooves are formed on the window. The graphene film covers the window, and the graphene film includes a first graphene film portion and a second graphene film portion, and the first graphene film portion and the second graphene film portion are spaced apart from each other. The plurality of electrodes are located on the surface of the insulating layer away from the substrate. The present application also provides a method for making the graphene heating chip.

Abstract: A method of making photolithography mask plate is provided. The method includes: providing a carbon nanotube layer on a substrate; depositing a chrome layer on the carbon nanotube layer, wherein the chrome layer includes a first patterned chrome layer and a second patterned chrome layer, the first patterned chrome layer is located on the carbon nanotube layer, and the second patterned chrome layer is deposited on the substrate corresponding to holes of the carbon nanotube layer; transferring the carbon nanotube layer with the first patterned chrome layer thereon from the substrate to a base, and the carbon nanotube layer being in contact with the base; and depositing a cover layer on the first patterned chrome layer.

Abstract: A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The substrate includes a plurality of protrusions spaced apart from each other, and one of the plurality of graphene nanoribbons is on the substrate and between two adjacent protrusions. An interdigital electrode is placed on the graphene nanoribbon composite structure, and the interdigital electrode covers the plurality of protrusions and is electrically connected to the plurality of graphene nanoribbons.

Abstract: A method of making photolithography mask plate is provided. The method includes: providing a carbon nanotube composite structure, wherein the carbon nanotube composite structure comprises a carbon nanotube layer and a chrome layer coated on the carbon nanotube layer; locating the carbon nanotube composite structure on a substrate to expose partial surfaces of the substrate; and depositing a cover layer on the carbon nanotube composite structure.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A vapor chamber heatsink assembly, under vacuum, having a working fluid therein, comprising a plurality of heatsink fins and a vapor chamber is provided. The vapor chamber and the plurality of heatsink fins each comprise a plurality of obstructers defining a plurality of braided channels therein. Thus, the condenser regions of the vapor chamber are expanded to the plurality of heatsink fins. When heat from a greater temperature heat source and a lower temperature heat source is applied to the vapor chamber, via the plurality of obstructers and braided channels, the working fluid and liquid vapor travel therethrough, providing an effective phase change mechanism to the greater temperature heat source, while concurrently, hindering agglomeration of working fluid thereto. An effective phase change mechanism is also concurrently provided to the lower temperature heat source due to the non-agglomeration of working fluid to the greater temperature heat source.

Abstract: The present application provides an inverter. The inverter includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form air gaps, and the air gaps are distributed at both sides of the bottom electrode. The gate electrode is configured to connect with a signal input terminal, the bottom electrode is configured to connect with a signal output terminal.

Abstract: The present application provides a logic gate device. The logic gate device includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form an air gap, and the air gap is distributed at both sides of the bottom electrode. The gate electrode is configured to connect a gate voltage, and the first top electrode and the second top electrode are configured to connect a signal input terminal.

Abstract: A hydrophobic film is provided. The hydrophobic film includes a flexible substrate; a hydrophobic layer located on the flexible substrate, a heating layer, a first electrode and a second electrode spaced apart from the first electrode. The hydrophobic layer comprises a base and a patterned bulge layer on a surface of the base away from the flexible substrate. The heating layer is on a surface of the flexible substrate away from the hydrophobic layer. The first electrode and the second electrode are electrically connected to and in direct contact with the heating layer.

Abstract: The present invention relates to a Fourier transform spectrometer applicable in an array of coherent light sources, comprising: a light source, a light transmission device, a control circuit, a detector, an amplifying circuit, and a computer. The control circuit is electrically connected to the light transmission device for control the on-off of light in the light transmission device. The amplifying circuit is connected with the detector for recording and amplifying the photoelectric signal obtained by the detector. The computer is connected with the amplifying circuit. The computer is equipped with a spectral analysis software is used to perform Fourier transform. The Fourier transform spectrometer based on the coherent light source array further includes a coherent light source array. The light transmission device is used to transmit the light emitted by the light source to the coherent light source array.

Abstract: A field effect transistor includes a gate electrode, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer is located on the surface of the gate electrode, and the channel layer is located on the surface of the insulating layer away from the gate electrode. The source electrode and the drain electrode are spaced apart from each on the surface of the channel layer away from the insulating layer. The source electrode and the drain electrode are one-dimensional structures. The present application further provides a method for making the field effect transistor.

Abstract: An infrared detector includes a thermoelectric element, an infrared light absorber located on the thermoelectric element, and an electrical signal detecting element. The infrared light absorber includes a first drawn carbon nanotube film, a second drawn carbon nanotube film, and a third drawn carbon nanotube film stacked on each other. The first drawn carbon nanotube film includes a plurality of first carbon nanotubes substantially extending along a first direction. The second drawn carbon nanotube film includes a plurality of second carbon nanotubes substantially extending along a second direction. The third drawn carbon nanotube film includes a plurality of third carbon nanotubes substantially extending along a third direction. The first direction and the second direction form an angle of about 42 degrees to about 48 degrees, and the first direction and the third direction form an angle of about 84 degrees to about 96 degrees.

Abstract: A field effect transistor includes a gate electrode, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer is located on the surface of the gate electrode, and the channel layer is located on the surface of the insulating layer away from the gate electrode. The source electrode and the drain electrode are spaced apart from each on the surface of the channel layer away from the insulating layer. The source electrode and the drain electrode are one-dimensional structures. The present application further provides a method for making the field effect transistor and a method for measuring an interface resistance of the field effect transistor.

Abstract: An device for measuring electron beam comprises a Faraday cup comprising an opening; a porous carbon material layer located on a surface of the Faraday cup and suspended at the opening; and an electricity meter electrically connected to the porous carbon material layer. A length of a suspended portion of the porous carbon material layer is greater than or equal to a maximum diameter of an electron beam to be measured. A diameter or a width of the porous carbon material layer is smaller than a minimum diameter of a cross section of the electron beam to be measured. The porous carbon material layer comprises a plurality of carbon material particles, and a plurality of micro gaps exist between the plurality of carbon material particles. A method for measuring an electron beam using the device for measuring electron beam is also provided.

Abstract: A method of making lithium-ion battery anode comprising step (S1)-step (S3). step (S1): providing a nano-silicon material, and coating a positively charged carbonizable polymer on a surface of the nano-silicon material, to obtain a nano-silicon coated with the positively charged carbonizable polymer. Step (S2): adding CNTs and the nano-silicon coated with the positively charged carbonizable polymer to a solvent; and performing an ultrasonic dispersion to obtain a dispersion. And step (S3): vacuum filtering the dispersion, to obtain a composite film of the CNTs and the nano-silicon coated with positively charged carbonizable polymer.

Abstract: A lithium-ion battery anode is provided. The lithium-ion battery anode comprises a carbon nanotube three-dimensional network structure formed by a plurality of carbon nanotubes intertwined with each other. A plurality of nano-silicon particles coated with amorphous carbon, dispersed in the carbon nanotube three-dimensional network structure, and adhered to surfaces of the plurality of carbon nanotubes. The amorphous carbon is obtained by calcining a positively charged carbonizable polymer. And a carbon nanotube functional layer located on two opposite surfaces of the carbon nanotube three-dimensional network structure, to make the carbon nanotube three-dimensional network structure located between two carbon nanotube functional layers. The carbon nanotube functional layer comprises at least two super-aligned carbon nanotube films stacked and crossed with each other.