Abstract: A headset with the active noise cancellation (ANC) function includes an ANC module, a plurality of speakers, a plurality of power drive circuits, and at least one reference microphone. An output end of any one of the plurality of power drive circuits is connected to at least one of the plurality speakers. The ANC module is connected between at least one reference microphone and input ends of the plurality of power drive circuits. The at least one reference microphone is configured to collect at least one first ambient noise signal. The ANC module is configured to obtain at least one mixed audio signal. The plurality of power drive circuits are configured to perform power amplification on the at least one mixed audio signal based on respective output powers to obtain at least one power-amplified mixed audio signal.

Abstract: Disclosed is a many-bit, groupable, reconfigurable, multi-valued, electronic operator and its construction method. Each bit of the electronic operator is provided with n column calculators and one potential combiner. A data input line is connected to an input terminal of an A signal selector, and an output terminal of the A signal selector is connected to a work permitter. Another input terminal of the work permitter is connected to a reconfiguration latch, and an output terminal of the work permitter is further connected to an output validator. Another input terminal of the output validator is connected to a power supply Vcc, and an output terminal of the output validator is connected to an output generator. Another input terminal of the output generator is connected to a reconfiguration circuit, and an output terminal of the output generator is connected to the potential combiner.

Abstract: Disclosed is a method for configuring an MSD parallel adder based on ternary logic operators. Five ternary logic operators that satisfy a sufficient condition for MSD addition are used to configure an MSD parallel adder. During the arrangement of a ternary logic operator, any method in the following may be used: each of ternary operators of n bits is reconfigured into a ternary logic operator each time, and reconfiguration is performed five times for implementation; each of ternary operators of n bits is reconfigured into two ternary logic operators having the same input each time, and reconfiguration is performed three times for implementation; each of ternary operators of n bits is reconfigured into five ternary logic operators of the same time, and reconfiguration is performed once for implementation; corresponding unreconfigurable ternary logic operators are used instead for the foregoing reconfiguration process.

Abstract: Disclosed is a many-bit, groupable, reconfigurable, multi-valued, electronic operator and its construction method. Each bit of the electronic operator is provided with n column calculators and one potential combiner. A data input line is connected to an input terminal of an A signal selector, and an output terminal of the A signal selector is connected to a work permitter. Another input terminal of the work permitter is connected to a reconfiguration latch, and an output terminal of the work permitter is further connected to an output validator. Another input terminal of the output validator is connected to a power supply Vcc, and an output terminal of the output validator is connected to an output generator. Another input terminal of the output generator is connected to a reconfiguration circuit, and an output terminal of the output generator is connected to the potential combiner.

Abstract: A computer system includes an addressing assembly, connected respectively to high bits of a memory address line of a processor and high bits of a word address line of a storage, and used to convert, in a preset continuous or discrete range on the storage, high bits of a memory address formed by the processor into high bits of a corresponding word address of the storage and output the high bits to the storage. Low bits of the memory address line of the processor are connected to low bits of the word address line of the storage. The preset range is smaller than or equal to an addressing range of the memory address line of the processor. The processor changes storage units of the storage covered by the preset range by changing the preset range. Thus it reduces cost, improves operation efficiency, shortens operation time, and has wide applicability.

Abstract: A computer system includes an addressing assembly, connected respectively to high bits of a memory address line of a processor and high bits of a word address line of a storage, and used to convert, in a preset continuous or discrete range on the storage, high bits of a memory address formed by the processor into high bits of a corresponding word address of the storage and output the high bits to the storage. Low bits of the memory address line of the processor are connected to low bits of the word address line of the storage. The preset range is smaller than or equal to an addressing range of the memory address line of the processor. The processor changes storage units of the storage covered by the preset range by changing the preset range. Thus it reduces cost, improves operation efficiency, shortens operation time, and has wide applicability.

Abstract: The present invention provides a control method for generating data sets for reduction of sulfur dioxide discharge in energy grid. The electric price parameters, energy-consumption parameters, and SO2 discharge parameters of the generating sets are collected and processed, and the final generating sets are selected according to different control goals or the comprehensive analysis of the electric price parameters, the energy-consuming parameters and the SO2 discharge parameters of the generating sets. The present invention sets the least SO2 discharge in general power grids as a target and solves the problem of the present loss of control of SO2 discharge in the generating sets.

Abstract: A real-time and concentrating control method for generating sets for grid energy saving and reduction of SO2 discharge, comprising the following steps: 1) electric parameter parameters of each generating set are inputted to EMS, 2) received information is identified, confirmed, and saved into the original database, and then the data is classified and sorted, 3) compare parameters with stake line and selected data of electric price and energy-consumption are outputted, the data is inputted to a computer, and carried out in preselection calculations, then, the preselection computer outputs the data, 4) selected data is inputted to a mainframe of a comprehensive analysis computer, then, the control signal is inputted to the AGC master station, and 5) automatic generation control system outputs control signals to the automatic generation control system of each generating company through a private data network of power grids.