Abstract: A display array organization used in a display panel is provided. The display array includes a data line, a first scan line, a second scan line, a first pixel electrode, a second pixel electrode, a front-end switch and an intermediary switch. The first pixel electrode is connected to the data line with the front-end switch, and the second pixel electrode is connected to the first pixel electrode with the intermediary switch. The operation of the front-end switch and intermediary switch are controlled by the first and second scan line respectively. When only the front-end switch is activated, the first pixel electrode can receive the data signal from the data line. When both the front-end and intermediary switches are activated, the second pixel electrode can receive a data signal from the data line.

Abstract: A display array organization used in a display panel is provided. The display array includes a data line, a first scan line, a second scan line, a first pixel electrode, a second pixel electrode, a front-end switch and an intermediary switch. The first pixel electrode is connected to the data line with the front-end switch, and the second pixel electrode is connected to the first pixel electrode with the intermediary switch. The operation of the front-end switch and intermediary switch are controlled by the first and second scan line respectively. When only the front-end switch is activated, the first pixel electrode can receive the data signal from the data line. When both the front-end and intermediary switches are activated, the second pixel electrode can receive a data signal from the data line.

Abstract: A display panel comprises the following elements. A pixel array arranged by a plurality of pixel devices is applied for producing images according to input signals. A plurality of COG chips are fabricated on a peripheral region of the display panel and connected in series wherein the COG chips can convey the input signals to the pixel array for driving selected the pixel devices. A plurality of WOA lines are defined on the display panel for connecting the COG chips in series to transfer the input signals. And a first bypassing bus is fabricated aside the COG chips and connected separately to two different WOA lines for connecting with at least one the COG chip in parallel so as to bypass the input signals.

Abstract: A display panel comprises the following elements. A pixel array arranged by a plurality of pixel devices is applied for producing images according to input signals. A plurality of COG chips are fabricated on a peripheral region of the display panel and connected in series wherein the COG chips can convey the input signals to the pixel array for driving selected the pixel devices. A plurality of WOA lines are defined on the display panel for connecting the COG chips in series to transfer the input signals. And a first bypassing bus is fabricated aside the COG chips and connected separately to two different WOA lines for connecting with at least one the COG chip in parallel so as to bypass the input signals.