Abstract: In order to provide a balance between a fast start-up in start-up phase and a low light output ripple in normal operation phase, it is provided a LED driving circuit comprising: an input to receive a LED driving current, a buffer circuit adapted to buffer said LED driving current, and an output to be connected to LED and adapted to output the LED driving current, after buffered, to the LED, characterized in that, further comprises a buffer adjustment circuit adapted to adjust the buffer capability of the buffer circuit at a first level, in a start-up phase of the LED driving circuit when the LED driving circuit starts to receive said LED driving current, and adjust the buffer capability of the buffer circuit at a second level larger than the first level in a normal operation phase later than the start-up phase.

Abstract: Aspects of the disclosure provide methods and apparatuses for audio processing. In some examples, an apparatus for media processing includes processing circuitry. The processing circuitry receives first 3 degrees of freedom (3 DoF) information associated with a first media content for a scene in a media application. The first 3 DoF information includes a first revolution orientation for describing the first media content on a first sphere centered at a user of the media application. The processing circuitry determines that a rendering platform for rendering the first media content is a six degrees of freedom (6 DoF) platform, and calculates, first spatial location information of the first media content based on the first revolution orientation and first parameters of the first sphere. The first spatial location information is used in first 6 DoF information associated with the first media content for rendering the first media content on the 6 DoF platform.

Abstract: In a method, a base mesh is generated from a down-sampled input mesh in a current frame, where the base mesh includes a plurality of vertices. A prediction mode to be applied to the base mesh is determined. The prediction mode is an inter prediction mode or an intra prediction mode. Based on the prediction mode being determined as the intra prediction mode, duplicate vertices among the plurality of vertices in the base mesh are merged to generate a subset of the plurality of vertices. At least the subset of the plurality of vertices is encoded based on the determined intra prediction mode to generate prediction information of at least the subset of the plurality of vertices.

Abstract: Aspects of the disclosure provide methods and apparatuses for audio processing. In some examples, an apparatus for media processing includes processing circuitry. The processing circuitry receive audio inputs associated with a layered description for a space of interest in an audio scene. The space of interest includes a plurality of subspaces. The layered description includes a first layer and a second layer. The first layer has a common node with a first value that is a common attribute value of two or more subspaces in the plurality of subspaces. The second layer has individual nodes respectively associated with each of the plurality of subspaces. The processing circuitry determines the plurality of subspaces of the space of interest based on the layered description, and renders an audio output based on the audio inputs in response to a location of a subject of the audio scene being in the space of interest.

Abstract: Aspects of the disclosure provide methods and apparatuses for video processing. In some examples, an apparatus for video processing includes processing circuitry. For example, processing circuitry determines a frame interval for a current block in a current frame within a sequence of frames. The frame interval indicates a group of frames in the sequence of frames with collocated blocks of the current block that satisfy an error metric requirement comparing to the current block. Further, the processing circuitry determines a replacement block based on the collocated blocks in the group of frames, and replaces the current block in the current frame with the replacement block.

Abstract: Method, apparatus, and system for texture coordinate prediction for mesh compression are provided. The process may include receiving, for a mesh, a coordinate of a first vertex and a coordinate of a prediction candidate vertex in a three dimensional (3D) space. The process may include determining a stretch perpendicular distance associated with the first vertex and the prediction candidate vertex, the stretch perpendicular distance being based on a conversion of the 3D space into a two dimensional (2D) space, and determining a 2D texture coordinate of the first vertex based on the stretch perpendicular distance associated with the first vertex and the prediction candidate vertex. The process may also include determining a residual of a predicted coordinate of the first vertex and an actual 2D coordinate of the first vertex; and compressing the mesh based on entropy coding the residual.

Abstract: A processing circuitry decodes a plurality of maps in 2D from a bitstream carrying a mesh frame. The mesh frame represents a surface of an object with polygons. The plurality of maps includes a decoded geometry map and a decoded attribute map with an adaptive 2D atlas sampling applied. The processing circuitry determines at least a first sampling rate and a second sampling rate according to syntaxes signaled in the bitstream. The first sampling rate is applied to a first region of the mesh frame and the second sampling rate is applied to a second region of the mesh frame during the adaptive 2D atlas sampling. The processing circuitry reconstructs, based on the plurality of maps, at least a first vertex of the mesh frame according to the first sampling rate, and a second vertex of the mesh frame according to the second sampling rate.

Abstract: Aspects of the disclosure provide methods and apparatuses for mesh coding (e.g., compression and decompression). In some examples, an apparatus for mesh coding includes processing circuitry. The processing circuitry decodes a plurality of initial maps in two-dimension from a bitstream carrying a three-dimensional (3D) mesh frame. The processing circuitry determines at least two sampling rates associated with different portions of the plurality of initial maps and recovers from the plurality of initial maps and based on the at least two sampling rates associated with the different portions of the plurality of initial maps to obtain a plurality of recovered maps. A first portion of the plurality of initial maps is recovered based on a first sampling rate, and a second portion of the plurality of initial maps is recovered based on a second sampling rate. The processing circuitry reconstructs the 3D mesh frame based on the plurality of recovered maps.

Abstract: Coding information of a mesh is received. The coding information includes a plurality of first coordinates and a plurality of second coordinates corresponding to a plurality of vertices and a texture map that are associated with the mesh. A respective first coordinate and a respective second coordinate associated with each of the plurality of vertices are normalized by adjusting the respective first coordinate based on a first factor and the respective second coordinate based on a second factor. The first factor and the second factor are associated with at least one of (i) a bit depth value indicating a coded range of the first coordinates and the second coordinates and (ii) a size of the texture map. The normalized respective first coordinate and the normalized respective second coordinate are expanded based on the first factor and the second factor respectively.

Abstract: Control unit for controlling an inverter with a plurality of half bridges each having a first switching element connected to a potential of a DC link and a second switching element connected to another potential of the DC link. The control unit provides first signals to the first switching elements such that they are turned off upon receiving a request signal, and second signals to the second switching elements such that they are turned on upon receiving the request signal and to perform a comparison of a measured electric parameter of the inverter with a predefined threshold value. The control unit provides a second signal such that the second switching element controlled by the second signal is turned off for a predefined time span, if a switching criterion comprising a condition that the comparison results in that the measured electric parameter reaches or crosses the threshold value is fulfilled.

Abstract: Control unit for controlling an inverter with a plurality of half bridges each having a first switching element connected to a potential of a DC link and a second switching element connected to another potential of the DC link. The control unit provides first signals to the first switching elements such that they are turned off upon receiving a request signal, and second signals to the second switching elements such that they are turned on upon receiving the request signal and to perform a comparison of a measured electric parameter of the inverter with a predefined threshold value. The control unit provides a second signal such that the second switching element controlled by the second signal is turned off for a predefined time span, if a switching criterion comprising a condition that the comparison results in that the measured electric parameter reaches or crosses the threshold value is fulfilled.